N8051AH Intel Corporation, N8051AH Datasheet
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N8051AH
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N8051AH Summary of contents
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... ROM X 8752BH 8K 8 EPROM X I Intel Corporationassumes no responsibility for the use of any circuit~ other than circuitryembodied in an Intel product.No other circuitpatent licenses are implied.Informationcontained herein supersedes previouslypublishedspecificationson theaa davices from Intel. O INTEL CORPORATION, 1994 MCS@51 Commercial/Express 8031AH18051AH18051AHP 8032N+18052N-I 8751W8751H-8 8751BW8752BI-I ...
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MCS” 51 CONTROLLER - JK2U Acc ~M ‘f2#fi+-oN,TMoD, <> ... ,, , 7’7 I ‘% PSEN TyG g~ ALE E RST-+ ‘* h ,,(-1 --% =2 ...
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PACKAGES Part Prefix 8051AH P 8031AH D 8052AH N 8032AH 6752BH* 8751H D 8751 H-8 8051AHP P D 8751 NOTE: *8752BH 36”/10” for D, and 38”/22” for N. is All thermal impedance data is approximate for static ...
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MCS” 51 CONTROLLER PIN DESCRIPTIONS Vcc: Supply voltage. Vss: Circuit ground. Port O:Port 8-bit open drain bidirectional 1/0 port output port each pin can sink 8 LS TTL inputs. Port Opins that have 1‘s written ...
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PSEN: Program Store Enable is the read strobe to external Program Memory. When the device is executing code from external Program Memory, PSEN is activated twice each ma- chine cycle, except that two PSEN activations are skipped during each ...
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MCS@51 CONTROLLER Prefix Package Type P Plastic D Cerdip N PLCC TD Cerdip TP Plastic PLCC TN LD Cerdip LP Plastic NOTE: Contactdistributoror localsalesofficeto matchEXPRESS prefixwith properdevice. DESIGN CONSIDERATIONS If an 8751 BH or 8752BH is replacing an 8751 H ...
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ABSOLUTE MAXIMUM RATINGS* Ambient Temperature Under Bias –40” 85°C Storage Temperature . Voltage on EA/Vpp Pin to Vss 8751 8751 ...
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MCS” 51 CONTROLLER DC CHARACTERISTICS (Over Operating Conditions) ~—.-...—.—. All oarameter values armlv to all devices unless otherwise indicated (Continued) r., .-. _r Symbol Parameter 11L2 Logical OInput Current (XTAL2) ILI Input Leakage Current (Porf O) 8751 H and 8751 ...
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EXPLANATION OF THE AC SYMBOLS Each timing symbol has 5 characters. The first char- acter is always a ‘T’ (stands for time). The other characters, depending on their positions, stand for the name of a signal or the logical status ...
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MCS@51 CONTROLLER EXTERNAL PROGRAM MEMORY CHARACTERISTICS ‘arame’er Symbol TLLWL ALE Low Low Address Low TAVWL TQVWX Data Valid to WR Transition 8751H All Others TQVWH Data Valid to WR High TWHQX Data ...
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EXTERNAL PROGRAM MEMORY READ CYCLE w--- TLHLL _ ALE -TAVLL+ PSEN / PORTO 1 x PORT 2 EXTERNAL DATA MEMORY READ CYCLE ALE Y +TLHLL+ PSEN — TLLWL m + TAVLL + _TLLAX AO-A7 FROM RI OR OPL PORTO . ...
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M=” 51 CONTROLLER SERIAL PORT TIMING—SHIFT Test Conditions: Over ODeratina Conditions: Load Capacitance = 80 rJF Parameter Symbol TXLXL Serial Port Clock Cycle Time TQVXH Output Data Setup to Clock Rising Edge TXHQX Output Data Hold after Clock Rising Edge ...
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EXTERNAL CLOCK DRIVE Symbol 1/TCLCL Oscillator Frequency (except 8751H-8) 8751H-8 TCHCX High Time Low Time TCLCX I TCLCH I Rise Time Fall Time TCHCL EXTERNAL CLOCK DRIVE WAVEFORM — TCHCX — t 2.5 AC TESTING INPUT, OUTPUT WAVEFORM 2.4 2.0 ...
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MCS@51 CONTROLLER EPROM CHARACTERISTICS Mode RST PSEN Program 1 1 Verify Security Set 1 NOTE: “1” = logichighfor that pin “O” = logiclowfor that pin “X” = “don’t care” PROGRAMMING THE 8751H To be programmed, the part must be running ...
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EPROM Security The security feature consists of a ‘locking” bit which when programmed denies electrical access by any external means to the on-chip Program Memory. The bit is programmed as shown in Figure 7. The setup and procedure are the ...
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MCS” 51 CONTROLLER GI-” ”nl r“”” ”mrnmrlmn. w I-8. ” ,Lrl.. PROGRAMMING P1.O-PI.7 P3,0-P3,3 $ PORTO DATAIN { , TOVGL — TAVGL kLE/PROG \ TSHGL — HIGH Fi.vPP TSHSN — P3.7 (ENABLE) 1 ‘ For programmingconditionssee Figure 5. ...
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Programming the 8751BH/8752BH To be programmed, the 875XBH must be running with MHz oscillator. (The reason the oscilla- tor needs to be running is that the internal bus is being used to transfer address and ...
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MCS@51 CONTROLLER QUICK-PULSE PROGRAMMING ALGORITHM The 875XBH can be programmed using the Quick- Pulse Programming Algorithm for microcontrollers. The features of the new programming method are a lower Vpp (12.75 volts as compared to 21 volts) and a shorter programming ...
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PROGRAM MEMORY LOCK The two-level Program Lock system consists of 2 Lock bits and a 32-byte Encryption Array which are used to protect the program memory against soft- ware piracy. ENCRYPTION ARRAY Within the EPROM array are 32 bytes of ...
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MCS” 51 CONTROLLER ERASURE CHARACTERISTICS Erasure of the EPROM begins to occur when the 8752BH is exposed to light with wavelengths shorter than approximately 4,000 Angstroms. Since sunlight and fluorescent lighting have wavelengths in this range, exposure to these light ...
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DATA SHEET REVISION HISTORY Datasheets are changed as new device information becomes available. Verify with your local Intel sales office that you have the latest version before finalizing a design or ordering devices. The following differences exist between this datasheet ...