MAX555CQK Maxim Integrated Products, MAX555CQK Datasheet

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MAX555CQK

Manufacturer Part Number
MAX555CQK
Description
300Msps, 12-bit DAC with complementary voltage outputs.
Manufacturer
Maxim Integrated Products
Datasheet

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MAX555CQK
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MAX555CQK
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The MAX555 is an advanced, monolithic, 12-bit digital-
to-analog converter (DAC) with complementary 50Ω
outputs. Fabricated using an oxide-isolated bipolar
process, the MAX555 is designed for signal-reconstruc-
tion applications at an output update rate of 300Msps.
It incorporates an analog multiplying function with
10MHz useable input bandwidth. The voltage-output
DAC uses precision laser trimming to achieve 12-bit
accuracy with ±1/2LSB integral and differential linearity
(±0.012% FS). Absolute gain error is a low 1% of full
scale. Full-scale transitions occur in less than 0.5ns.
Internal registers and a unique decoder reduce glitch-
ing and allow the MAX555 to achieve precise RF perfor-
mance with over 73dBc of spurious-free dynamic range
at 50Msps with f
with f
The MAX555 operates from a single -5.2V supply and
dissipates 980mW (nominal). It comes in a 68-pin ther-
mally enhanced PLCC package capable of accepting a
heatsink.
________________________Applications
19-0297; Rev 1; 9/95
Call toll free 1-800-998-8800 for literature.
___________________________________________________Simplified Block Diagram
_______________General Description
OUT
Direct Digital Synthesis
Arbitrary Waveform Generation
HDTV/High-Resolution Graphics
Instrumentation
Communications Local Oscillators
Automated Tester Applications
= 18.6MHz.
12-BIT
LINES
ECL
OUT
________________________________________________________________ Maxim Integrated Products
= 3.1MHz, or 62dBc at 300Msps
CLK
BYPASS
CLK
DECODED
Complementary Voltage Outputs
LINES
BIT
MAX555
300Msps, 12-Bit DAC with
____________________________Features
Pin Configuration appears at end of data sheet.
______________Ordering Information
MAX555CQK
AV
12-Bit Resolution
±1/2LSB Integral and Differential Nonlinearity
Capable of 300Msps Min Update Rate
Complementary 50Ω Outputs
Multiplying Reference Input
Low Glitch Energy (5.6pVs)
Single -5.2V Power Supply
On-Chip Data Registers
ECL-Compatible Inputs with Differential Clock
EE
PART
-20mA
TEMP. RANGE
0°C to +70°C
50
50
800
800
PIN-PACKAGE
68 Thermally
Enhanced PLCC
ROFFSET
VREF
VOUT
LGND
VOUT
1

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MAX555CQK Summary of contents

Page 1

... Capable of 300Msps Min Update Rate Complementary 50Ω Outputs Multiplying Reference Input Low Glitch Energy (5.6pVs) Single -5.2V Power Supply On-Chip Data Registers ECL-Compatible Inputs with Differential Clock ______________Ordering Information PART MAX555CQK Pin Configuration appears at end of data sheet. MAX555 BIT LINES -20mA AV EE TEMP. RANGE ...

Page 2

DAC with Complementary Voltage Outputs ABSOLUTE MAXIMUM RATINGS Analog Supply Voltage (AV ) .................................-7V to +0.3V EE Digital Supply Voltage (DV ) ..................................-7V to +0.3V EE Digital Input Voltage (D0–D11) ...................................-5. Reference Input Voltage (V ) ...

Page 3

Complementary Voltage Outputs ELECTRICAL CHARACTERISTICS (continued) ( -5.2V 1.000V REF MIN PARAMETER SYMBOL DIGITAL INPUTS Input Current, Logic High I IH Input Current, Logic Low I IL Logic "1" Voltage V IH ...

Page 4

DAC with Complementary Voltage Outputs __________________________________________Typical Operating Characteristics (VREF = 0.75V +25°C, unless otherwise noted.) A SPURIOUS-FREE DYNAMIC RANGE vs 50MHz) OUT CLK ...

Page 5

Complementary Voltage Outputs _____________________Pin Description PIN NAME FUNCTION Disables latching of data 1 BYPASS when high (ECL input) 2 CLK Data Clock (ECL input) 3 CLK Data Clock Not (ECL input) 4, 56, 57, DGND Digital Signal Grounds 63, 66 ...

Page 6

DAC with Complementary Voltage Outputs DIGITAL SECTION LSB (D0) MASTER REGISTER 8 12 INPUTS MSB (D11) DECODER CLK 2 CLK BYPASS VREF/2 400 400 VREF 1V FS 800 ROFFSET Figure 1. Functional Diagram 6 ...

Page 7

Complementary Voltage Outputs Table 1. Output Coding DIGITAL CODE VOUT (D11–D0) (V) 000000000000 -0.999756 000000000001 -0.999512 011111111111 -0.500000 100000000000 -0.499756 111111111111 0 Timing Information The MAX555 features a differential ECL clock input with selective transparent operation (BYPASS = 1). It ...

Page 8

DAC with Complementary Voltage Outputs and digital ground pins must be connected directly to the analog ground plane at the MAX555, preferably with a “star connection” at the LGND pins (15 and 16). High-speed ECL inputs, as well ...

Page 9

Complementary Voltage Outputs OUTPUT SPECTRUM (f = 5MHz 50MHz) OUT CLK -1 -11 -21 -31 -41 -51 -61 -71 -81 2.3MHz/div OUTPUT SPECTRUM (f = 9.3MHz 150MHz) OUT CLK -1 -11 -21 -31 -41 -51 -61 ...

Page 10

DAC with Complementary Voltage Outputs V REF 1.000V 0 REF 1.25mA 50 LINES 38, 39 VREF VREF/2 54 D11 (MSB) -2V 58 D10 - - - - -2V ...

Page 11

Complementary Voltage Outputs ____________________________________________________________Pin Configuration TOP VIEW 9 8 N.C. 10 N.C. 11 N.C. 12 VOUT 13 VOUT 14 LGND 15 LGND 16 17 VOUT 18 VOUT (TN AGND 21 N.C. 22 N.C. 23 N.C. 24 N.C. N.C. ...

Page 12

DAC with Complementary Voltage Outputs ________________________________________________________Package Information NOTES DOES NOT INCLUDE MOLD FLASH 2. MOLD FLASH OR THE PROTRUSIONS NOT TO EXCEED .20mm (.008") PER SIDE 3. LEADS TO BE COPLANAR ...

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