M6MGB162S4BVP MITSUBISHI, M6MGB162S4BVP Datasheet

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M6MGB162S4BVP

Manufacturer Part Number
M6MGB162S4BVP
Description
CMOS 3.3V only flash memory
Manufacturer
MITSUBISHI
Datasheet

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M6MGB162S4BVP
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The MITSUBISHI M6MGB/T162S4BVP is a Stacked Multi
Chip Package (S-MCP) that contents 16M-bits flash memory
and 4M-bits Static RAM in a 48-pin TSOP (TYPE-I).
16M-bits Flash memory is a 1048576 words, 3.3V-only, and
high performance non-volatile memory fabricated by CMOS
technology for the peripheral circuit and DINOR(DIvided
bit-line NOR) architecture for the memory cell.
4M-bits SRAM is a 262144words unsynchronous SRAM
fabricated by silicon-gate CMOS technology.
M6MGB/T162S4BVP is suitable for the application of the
mobile-communication-system to reduce both the mount
space and weight .
DESCRIPTION
F-RY/BY#
F-WP#
S-VCC
F-RP#
S-CE
WE#
A19
A17
A10
A18
A14
A13
A12
A15
A11
A7
A5
A4
A2
A1
A6
A3
A9
A8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
F-VCC
S-VCC
GND
S-A-1
A0-A17
A18-A19
DQ0-DQ15
F-CE#
S-CE
OE#
WE#
F-WP#
F-RP#
F-RY/BY#
PIN CONFIGURATION (TOP VIEW)
:Vcc for Flash
:Vcc for SRAM
:GND for Flash SRAM
:Address for SRAM
:Flash/SRAM common Address
:Address for Flash
:Data I/O
:Flash Chip Enable
:SRAM Chip Enable
:Flash/SRAM Output Enable
:Flash/SRAM Write Enable
:Flash Write Protect
:Flash Reset Power Down
:Flash Ready /Busy
14.0 mm
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
4,194,304-BIT (524,288-WORD BY 8-BIT) CMOS SRAM
• Access time
• Supply voltage
• Ambient temperature
• Package : 48-pin TSOP (Type-I) , 0.4mm lead pitch
FEATURES
Mobile communication products
APPLICATION
3.3V-ONLY FLASH MEMORY &
Stacked-MCP (Multi Chip Package)
M6MGB/T162S4BVP
Flash Memory
SRAM
W version
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC:Non Connection
A16
GND
DQ15
S-A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
F-VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
GND
DQ8
DQ0
OE#
F-CE#
A0
Sep. 1999 , Rev.2.0
MITSUBISHI LSIs
85ns (Max.)
90ns (Max.)
Vcc=2.7 ~ 3.6V
Ta=-20 ~ 85°C

Related parts for M6MGB162S4BVP

M6MGB162S4BVP Summary of contents

Page 1

... DESCRIPTION The MITSUBISHI M6MGB/T162S4BVP is a Stacked Multi Chip Package (S-MCP) that contents 16M-bits flash memory and 4M-bits Static RAM in a 48-pin TSOP (TYPE-I). 16M-bits Flash memory is a 1048576 words, 3.3V-only, and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and DINOR(DIvided bit-line NOR) architecture for the memory cell ...

Page 2

... Y-GATE / SENSE AMP. STATUS / ID REGISTER CUI WSM WSM DATA INPUTS/OUTPUTS 524288 WORD x 8 BITS CLOCK GENERATOR MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) 32KW 32KW 16KW 16KW 16KW 16KW 16KW 16KW 16KW 16KW MULTIPLEXER INPUT/OUTPUT ...

Page 3

... Parameter Block ...................... Bank(II) Main Block ......................................... Program/Erase cycles 3 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 4,194,304-BIT (524,288-WORD BY 8-BIT) CMOS SRAM Boot Block 1048,576 word x 16bit M6MGB162S4BVP M6MGT162S4BVP Other Functions V = 2.7~3.6V CC Soft Ware Command Control Selective Block Lock 90ns (Max.) Erase Suspend/Resume Program Suspend/Resume Status Register Read 54 mW (Max ...

Page 4

... The power consumption becomes the same as the stand-by mode. While in this mode, the output data is latched and can be read out. New data is read out correctly when addresses are changed. MITSUBISHI LSIs After Sep. 1999 , Rev.2.0 ...

Page 5

... MEMORY ORGANIZATION The Flash Memory of M6MGB/T162S4BVP has one 16Kword boot block, seven 16Kword parameter blocks, for Bank(I) and twenty-eight 32Kword main blocks for Bank(II). A block is erased independently of other blocks in the array. MITSUBISHI LSIs Low LKO, see P.10. LKO, Sep. 1999 , Rev.2.0 ...

Page 6

... PARAMETER BLOCK 1 04000H-07FFFH 00000H-03FFFH 16Kword BOOT BLOCK (Word Mode) Flash Memory of M6MGB162S4BVP 6 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 4,194,304-BIT (524,288-WORD BY 8-BIT) CMOS SRAM Memory Map MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) x16 ( Wordmode) ...

Page 7

... MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) F-RP# DQ 0-15 V Data out IH V Status Register Data IH Lock Bit Data ( Identifier Code ...

Page 8

... Bank Write D0H Bank Write 71H X Read 77H Write Bank Write Write X Write A7H MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) 2nd bus cycle 3rd ~129th bus cycles (Word Mode) Data Mode Address Address (DQ15- ...

Page 9

... Locked Locked Locked Unlocked Unlocked Locked All Blocks Unlocked "1" Ready Suspended Error Error Error - - - MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Note Definition "0" Busy Operation in Progress / Completed Successful Successful Successful - - - Sep. 1999 , Rev.2.0 ...

Page 10

... OUT F-V = 3.6V F-CE# =WE F-RP#=OE#=V IH F-VCC = 3.6V, VIN=VIL/VIH, F-CE# = F-RP# =F-WP# = VIH F-VCC = 3.6V, VIN=VIL/VIH, F-CE# = F-RP# =F-WP# = VIH F-VCC = 3.6V, VIN=VIL/VIH, F-CE# = F-RP# =F-WP# = VIH I = 4.0mA –2.0mA –100mA OH MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package ...

Page 11

... F-Vcc = 2.7V ~3.6V) Parameter Min 150 (Ta = -20 ~85°C, F-Vcc = 2.7V ~3.6V) Parameter Min 150 MITSUBISHI LSIs M6MGB/T162S4BVP Limits F-Vcc=2.7-3.6V Unit 90ns Typ Max 150 ns ns Limits F-Vcc=2 ...

Page 12

... Min 150 Typ Min 40 1.0 4 Typ Min Min Typ 2 MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Limits F-Vcc=2.7-3.6V Unit 90ns Typ Max ...

Page 13

... OLZ t CLZ OUTPUT VALID MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Read /Write Inhibit TEST CONDITIONS FOR AC CHARACTERISTICS Input voltage : Input rise and fall times : £5ns Reference voltage t at timing measurement : 1.5V ...

Page 14

... VALID a(CE) t a(OE OEH GHEL DIN DOUT DIN BLS MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) READ STATUS PROGRAM REGISTER ARRAY COMMAND BANK ADDRESS VALID 7FH t a(CE) t a(OE) t OEH t DAP SRD DIN t WHRL ...

Page 15

... DAP PROGRAM VALID OEH DIN EHRL t DAP MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) READ STATUS WRITE READ REGISTER ARRAY COMMAND BANK(I) ADDRESS VALID t a(CE) t a(OE) SRD FFH t BLH (to only BANK(I)) READ STATUS WRITE READ ...

Page 16

... CEPH t OEH t DAE 20H D0H t EHRL t BLS MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) READ STATUS ERASE REGISTER ARRAY COMMAND BANK ADDRESS VALID t a(CE) t a(OE) SRD t BLH READ STATUS ERASE REGISTER ARRAY COMMAND BANK ADDRESS VALID ...

Page 17

... ADDRESS VALID 01H~7EH 00H 7FH OEH DIN DIN DIN t DH MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Change Bank Address ARRAY READ FROM THE OTHER BANK WITH BGO VALID VALID VALID VALID t a(CE) t a(OE) SRD DOUT t ...

Page 18

... ADDRESS VALID VALID OEH DIN SRD EHRL MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Change Bank Address ARRAY READ FROM BANK(II) WITH BGO VALID VALID VALID VALID t a(CE) t a(OE) DOUT DOUT Change Bank Address ...

Page 19

... OEH D0H SRD EHRL MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Change Bank Address ARRAY READ FROM THE OTHER BANK WITH BGO VALID VALID t a(CE) t a(OE) DOUT DOUT Change Bank Address READ DATA FROM THE OTHER BANK ...

Page 20

... OEH Program Suspend Latency WP B0H t BLS t AH CEP t OEH Program Suspend Latency t WH B0H t BLS MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) READ STATUS REGISTER BANK ADDRESS VALID t a(CE) t a(OE) S.R.6,7=1 VALID SRD t BLH READ STATUS REGISTER BANK ADDRESS VALID ...

Page 21

... ADDRESS n, DATA n NO WRITE B0H ? YES STATUS REGISTER SUSPEND LOOP WRITE D0H YES FULL STATUS CHECK PAGE PROGRAM MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) LOCK BIT PROGRAM FLOW CHART START WRITE 77H WRITE D0H BLOCK ADDRESS SR ...

Page 22

... Please use BGO function. BLOCK ERASE FLOW CHART NO WRITE B0H ? YES SUSPEND LOOP WRITE D0H YES MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) START SUSPEND WRITE B0H STATUS REGISTER READ SR ...

Page 23

Read/Standby State 50H Clear Status Register D0H WD Setup State 55H 74H Clear Single Data Load Page Buffer to Flash Page Buffer to Page Buffer Setup Setup Setup OTHER Internal State Ready Read State with BGO Read Array (From The ...

Page 24

... Mode WE# OE# DQ0 High-Z Non selection L X Write Din H L Read Dout H H High-Z MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Icc Standby Active Active Active Sep. 1999 , Rev.2.0 ...

Page 25

... Output - open (duty 100%) < = S-CE 0.2V -W Other inputs=0~S-Vcc - 20 ~ +25 C S-CE=V IL Other inputs S-Vcc Conditions V =GND, V =25mVrms, f=1MHz GND,V =25mVrms, f=1MHz O O MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Ratings Units -0 -0.5 ~ S-Vcc + 0 S-Vcc 700 + +150 < 30ns S-Vcc=2 ...

Page 26

... Fig.1,CL=30pF CL=5pF (for ten,tdis) Min Min MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) 1TTL DQ CL Including scope and jig capacitance Fig.1 Output load Limits SRAM Units Max ...

Page 27

... CW t (CE (A- (W) dis t (OE) dis DATA IN STABLE MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package (CE) dis t (OE) dis VALID DATA (Note3) t (W) rec t (OE (W) en (D) Sep. 1999 , Rev.2.0 ...

Page 28

... Note 5: Don't apply inverted phase signal externally when DQ pin is in output mode. 28 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 4,194,304-BIT (524,288-WORD BY 8-BIT) CMOS SRAM ( DATA IN STABLE MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) t (W) rec (Note3) (D) Sep. 1999 , Rev.2.0 ...

Page 29

... S-Vcc S-CE 0.2V 29 16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS 4,194,304-BIT (524,288-WORD BY 8-BIT) CMOS SRAM Test conditions S-Vcc=3.0V -W > S-CE 0.2V = other inputs=0~3V Test conditions 2.7V > S-CE 0. (PD) MITSUBISHI LSIs M6MGB/T162S4BVP 3.3V-ONLY FLASH MEMORY & Stacked-MCP (Multi Chip Package) Limits Min Typ Max 2.0 0 + + +25 ~ +40 C ...

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