M5M51016BTP-10VLL MITSUBISHI, M5M51016BTP-10VLL Datasheet

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M5M51016BTP-10VLL

Manufacturer Part Number
M5M51016BTP-10VLL
Description
1048576-bit (65536-word by 16-bit) CMOS static RAM
Manufacturer
MITSUBISHI
Datasheet

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Part Number:
M5M51016BTP-10VLL
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Part Number:
M5M51016BTP-10VLL
Manufacturer:
MIT
Quantity:
3 909
Part Number:
M5M51016BTP-10VLL
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DESCRIPTION
FEATURES
The M5M51016BTP, RT are a 1048576-bit CMOS static RAM
organized as 65536 word by 16-bit which are fabricated using high-
performance triple polysilicon CMOS technology. The use of resistive
load NMOS cells and CMOS periphery result in a high density and low
power static RAM.
the battery back-up application.
package which is a high reliability and high density surface mount device
(SMD). Two types of devices are available.
lead bend type package), M5M51016BRT (reverse lead bend type
package). Using both types of devices, it becomes very easy to design
a printed circuit board.
APPLICATION
Small capacity memory units
The M5M51016BTP,RT are packaged in a 44-pin thin small outline
They are low stand-by current and low operation current and ideal for
M5M51016BTP,RT-10VL
M5M51016BTP,RT-10VLL
Single +3.3V power supply
Low stand-by current 0.3µA (typ.)
Directly TTL compatible : All inputs and outputs
Easy memory expansion and power down by CS, BC
Data hold on +2V power supply
Three-state outputs : OR-tie capability
OE prevents data contention in the I/O bus
Common data I/O
Package
M5M51016BTP,RT
Type name
..............................
Access time
100ns
100ns
(max)
Power supply current
Active
(1MHz)
(max)
12mA
M5M51016BTP(normal
44pin 400mil TSOP(II)
1
(V
(V
(V
typ)
& BC
stand-by
CC
CC
CC
12µA
0.3µA
(max)
60µA
= 3.6V)
= 3.6V)
= 3.0V,
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
2
1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM
MITSUBISHI
ELECTRIC
PIN CONFIGURATION (TOP VIEW)
OUTPUT ENABLE
CHIP SELECT
OUTPUTS
CONTROL
CONTROL
ADDRESS
ADDRESS
ADDRESS
OUTPUTS
INPUTS/
INPUTS
INPUTS
INPUTS/
INPUTS
INPUTS
INPUTS
Outline 44P3W - H (400mil TSOP Normal Bend)
Outline 44P3W - J (400mil TSOP Reverse Bend)
WRITE
DATA
BYTE
DATA
M5M51016BTP,RT-10VL,
M5M51016BTP,RT-10VL,
INPUT
INPUT
(0V)GND
(0V)GND
(5V)V
DQ
NC
BC
BC
A
A
A
A
A
A
DQ
DQ
DQ
DQ
DQ
DQ
DQ
W
A
NC
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
NC
A
A
A
A
A
A
A
A
A
CS
OE
14
15
13
9
11
10
8
NC
12
7
6
5
4
3
2
1
0
CC
1
2
14
16
15
13
12
11
10
9
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
MITSUBISHI LSIs
MITSUBISHI LSIs
10
11
12
13
14
15
16
17
18
19
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
20
21
22
1
2
3
4
5
6
7
8
9
NC : NO CONNECTION
GND(0V)
NC
BC
BC
NC
A
A
A
W
A
A
A
A
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
V
NC
A
A
A
A
A
A
A
A
A
CS
GND(0V)
NC
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
OE
-10VLL
14
15
13
8
9
11
10
CC
12
7
6
5
4
3
2
1
0
-10VLL
1
2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
(5V)
OUTPUT ENABLE
INPUT
CHIP SELECT
INPUT
9 Jul ,1997
BYTE
CONTROL
INPUTS
ADDRESS
INPUTS
WRITE
CONTROL
ADDRESS
INPUTS
DATA
INPUTS/
OUTPUTS
INPUTS
DATA
INPUTS/
OUTPUTS
9 Jul ,1997
ADDRESS
INPUTS
1

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M5M51016BTP-10VLL Summary of contents

Page 1

... They are low stand-by current and low operation current and ideal for the battery back-up application. The M5M51016BTP,RT are packaged in a 44-pin thin small outline package which is a high reliability and high density surface mount device (SMD). Two types of devices are available. ...

Page 2

... H 65536 WORDS x16 BITS ( 1024 ROWS x 256 COLUMNS x 4 BLOCKS ) CLOCK GENERATOR MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M51016BTP,RT-10VL, -10VLL and high level low level, the chips and the memory data can be held at +2V power CC3 ...

Page 3

... Test conditions , =GND, V =25mVrms, f=1MHz =GND, V =25mVrms, f=1MHz =GND,V =25mVrms, f=1MHz O O MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M51016BTP,RT-10VL, Ratings - 0.3 ~ 4.6 - 0.3* ~ Vcc + 0 Vcc 150 Limits Typ Min 2.0 Vcc+0.3V - 0.3* 2.4 Vcc-0. Min IH cycle 1MHz ) IL Min cycle ...

Page 4

... Parameter high 1 high 2 low 1 low 2 Parameter MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M51016BTP,RT-10VL, -10VLL 1TTL Including scope L Fig.1 Output load Limits M5M51016B -10VL,-10VLL Min Typ Max 100 100 100 100 100 ...

Page 5

... DATA IN STABLE t su (D) MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M51016BTP,RT-10VL, -10VLL t v (A) (Note dis (BC1) t dis (BC2) (Note 3) t dis (CS) (Note 3) t dis (OE) DATA VALID (Note 3) (Note 3) t rec (W) ...

Page 6

... Note 3: Hatching indicates the state is "don't care". 4: Writing is executed while CS high overlaps BC 5: When the falling edge simultaneously or prior to the falling edge of BC maintained in the high impedance state. 6: Don't apply inverted phase signal externally when DQ pin is output mode. M5M51016BTP,RT-10VL, 1048576-BIT(65536-WORD BY 16-BIT)CMOS STATIC RAM ...

Page 7

... CS > V 0.2V,other inputs unless otherwise noted ) C Test conditions 3. (PD) BC & > 3. (PD) < CS 0.2V MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M51016BTP,RT-10VL, Limits Min Typ 2 2.0 -VL 3V 0.2V, -VLL 0.3 (Note Limits Min Typ 0 5 3.0V t rec (PD) 2.0V 0.2V CC 3.0V t rec (PD) 0.2V 9 Jul ,1997 ...

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