AM29F800BT-55SI Advanced Micro Devices, AM29F800BT-55SI Datasheet

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AM29F800BT-55SI

Manufacturer Part Number
AM29F800BT-55SI
Description
8 megabit CMOS 5.0 volt-only boot sector flash memory
Manufacturer
Advanced Micro Devices
Datasheet

Specifications of AM29F800BT-55SI

Case
SOP

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Am29F800B
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— 5.0 Volt-only operation for read, erase, and
— Minimizes system level requirements
Manufactured on 0.35 µm process technology
— Compatible with 0.5 µm Am29F800 device
High performance
— Access times as fast as 55 ns
Low power consumption (typical values at 5
MHz)
— 1 µA standby mode current
— 20 mA read current (byte mode)
— 28 mA read current (word mode)
— 30 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
program operations
fifteen 64 Kbyte sectors (byte mode)
fifteen 32 Kword sectors (word mode)
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
PRELIMINARY
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Minimum 1,000,000 program/erase cycles per
sector guaranteed
Package option
— 48-pin TSOP
— 44-pin SO
Compatibility with JEDEC standards
— Pinout and software compatible with single-
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
power-supply Flash
program or erase operation completion
program or erase cycle completion
or program data to, a sector that is not being
erased, then resumes the erase operation
array data
Publication# 21504
Issue Date: April 1998
Rev: C Amendment/+1

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AM29F800BT-55SI Summary of contents

Page 1

PRELIMINARY Am29F800B 8 Megabit ( 8-Bit/512 K x 16-Bit) CMOS 5.0 Volt-only, Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — 5.0 Volt-only operation for read, erase, and program operations — Minimizes system level requirements Manufactured ...

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GENERAL DESCRIPTION The Am29F800B Mbit, 5.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The device is offered in 44-pin SO and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) ...

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PRODUCT SELECTOR GUIDE Family Part Number V = 5.0 V ± Speed Option V = 5.0 V ± 10% CC Max access time ACC Max CE# access time Max OE# access ...

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CONNECTION DIAGRAMS A15 1 A14 2 3 A13 A12 4 A11 5 A10 WE# 11 RESET RY/BY# 15 A18 16 A17 ...

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CONNECTION DIAGRAMS RY/BY# A18 A17 CE# V OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 PIN CONFIGURATION A0–A18 = 19 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, ...

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... Am29F800BT-55, EC, EI, FC, FI, SC, SI Am29F800BB-55 Am29F800BT-70, Am29F800BB-70 Am29F800BT-90, EC, EI, EE, Am29F800BB-90 FC, FI, FE, Am29F800BT-120, SC, SI, SE Am29F800BB-120 Am29F800BT-150, Am29F800BB-150 OPTIONAL PROCESSING Blank = Standard Processing B = Burn-in (Contact an AMD representative for more information) TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (– ...

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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register it- self does not occupy any addressable memory loca- tion. The register is composed ...

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After the system writes the autoselect command se- quence, the device enters the autoselect mode. The system can then read autoselect codes from the inter- nal register (which is separate from the memory array) on DQ7–DQ0. Standard read cycle timings ...

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... Table 2. Am29F800BT Top Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 ...

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Table 3. Am29F800BB Bottom Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 ...

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Table 4. Am29F800B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29F800B Byte L (Top Boot Block) Device ID: Word L Am29F800B Byte L (Bottom Boot Block) Sector Protection Verification L L ...

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Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to the Command Defi- nitions table). In addition, the following hardware data protection measures prevent accidental erasure or pro- ...

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Autoselect Command Sequence The autoselect command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not a sector is protected. The Command Definitions table shows the address and data requirements. This method is ...

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The Chip Erase command se- quence should be reinitiated once the device has returned to reading array data, to ensure data integrity. The system can determine the status of ...

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The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows reading autoselect codes even at addresses within erasing sectors, since the codes are not stored in the memory array. ...

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Table 5. Am29F800B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...

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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsections de- scribe the functions of these bits. DQ7, RY/BY#, and ...

Page 18

RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

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The remaining scenario is that the system initially de- termines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles, de- termining the ...

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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied ...

Page 22

DC CHARACTERISTICS TTL/NMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Note 1) V Active Write Current CC I CC2 (Notes 2 ...

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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current Active Read Current CC1 CC V Active Write Current CC I CC2 (Notes 1 and 2) ...

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TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalents. Figure 8. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted ...

Page 25

AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

Page 26

AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

Page 27

AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std. Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

Page 28

AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...

Page 29

AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# t GHWL OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device ...

Page 30

AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# t GHWL OE# WE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for reading ...

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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...

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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use OE# or CE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within the erase-suspended sector. Temporary Sector ...

Page 33

AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...

Page 34

AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes Program Address Program Data Sector Address, DQ7# = Complement ...

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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time (Note 2) Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 2) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 ...

Page 36

PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 13.10 15.70 13.50 ...

Page 37

PHYSICAL DIMENSIONS (continued) TS 048—48-Pin Standard Thin Small Outline Package (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC TSR048—48-Pin Reverse Thin Small Outline Package (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM ...

Page 38

REVISION SUMMARY FOR AM29F800B Revision B Global Added -55 speed option. Changed data sheet designa- tion from Advance Information to Preliminary. Sector Protection/Unprotection Corrected text to indicate that these functions can only be implemented using programming equipment. Table 1, Device ...

Page 39

... Trademarks Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...

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