AM28F512-120EC Advanced Micro Devices, AM28F512-120EC Datasheet
AM28F512-120EC
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AM28F512-120EC Summary of contents
Page 1
... Write and erase voltage 12 GENERAL DESCRIPTION The Am28F512 is a 512 K bit Flash memory orga- nized as 64 Kbytes of 8 bits each. AMD’s Flash mem- ories offer the most cost-effective and reliable read/ write non-volatile random access memor y. The Am28F512 is packaged in 32-pin PDIP, PLCC, and TSOP versions ...
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... For system design simplification, the Am28F512 is designed to support either WE# or CE# controlled writes. During a system write cycle, ad- dresses are latched on the falling edge of WE# or CE# whichever occurs last ...
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... DQ0 DQ6 13 20 DQ1 DQ5 14 19 DQ2 15 DQ4 18 V DQ3 Note: Pin 1 is marked for orientation DQ0 11561G-2 Am28F512 PLCC A14 29 6 A13 A11 25 10 OE# (G A10 23 ...
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... LOGIC SYMBOL 4 32-Pin — Standard Pinout 32-Pin — Reverse Pinout 16 A0–A15 DQ0–DQ7 CE# (E#) OE# (G#) WE# (W#) Am28F512 OE# 32 A10 31 CE ...
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... See Product Selector Guide and Valid Combinations Valid Combinations list configurations planned to be sup- ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and JC, JI, JE, to check on newly released combinations. FC, FI, FE Am28F512 Valid Combinations 5 ...
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... The tar- get address is latched on the falling edge of the Write Enable pulse and the appropriate data is latched on the rising edge of the pulse. Write Enable high inhibits writ- ing to the device. Am28F512 5% or 10%) must be at high voltage in ...
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... The device also incorporates several features to pre- vent inadvertent write cycles resulting fromV up and power-down transitions or system noise. Low V Write Inhibit CC To avoid initiation of a write cycle during V and power-down, the device locks out write cycles for Am28F512 power- CC power- ...
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... memory contents can be read but not written or erased. PP PPL (standby and V should not exceed 10.0 Volts. Also, the Am28F512 has Am28F512 . To initiate a write cycle CE# and IH will not accept commands on the rising (Note ...
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... For the device these two bytes are given in Table 2 below. All identifiers for manufacturer and device codes will exhibit odd parity with the MSB (DQ7) de- fined as the parity bit. Table 2. Am28F512 Auto Select Code Am28F512 (11 13 address A9. Two ID from ...
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... In order to write, OE# must and CE# and WE# IH must any pin is not in the correct state a write IL command will not be executed. Table 3. Am28F512 Command Definitions Operation Command (Note 4) (Note 1) Read Memory Write Read Auto select Write Erase Set-up/Erase Write ...
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... Program Setup) to the command register. Figure 1 and Table 4, the Flasherase electrical erase algorithm, illustrate how commands and bus operations are combined to per- form electrical erasure. Refer to AC Erase Characteris- tics and Waveforms for specific timing parameters. Am28F512 11 ...
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... Write Erase Setup Command Write Erase Command Time out 10 ms Write Erase Verify Time out 6 µs Read Data from Device No Increment Data = FFh PLSCNT Yes No Last Address Yes Write Reset Command Apply V PPL Erasure Completed Flasherase Electrical Erase Algorithm Am28F512 Increment Address 11559G-6 ...
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... Data = FFh, reset the register for read operations Wait for V PP parameters. The V power supply can be hard-wired to the device may be ground, no connect with a resistor tied to ground, or less than V PPL Am28F512 pin. Figure 1 illustrates the electrical PP Comments Ramp to V (Note 1) PPH ) WHWH2 ...
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... This command terminates the erase oper- ation on the rising edge of the WE# pulse (section D). The Erase-verify command also stages the device for data verification (section F). After each erase operation each byte must be verified. The byte address to be verified must be supplied with Am28F512 Data Out ...
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... Most bytes verify after the first or second pulse. The entire sequence of pro- gramming and byte verification is performed with high voltage applied to the V PP lustrate the programming algorithm. Am28F512 pin. Figure 3 and Table 5 il- 15 ...
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... Write Program Command (A/D) Time out 10 µs Write Program Verify Command Time out 6 µs Read Data from Device No Verify Byte Increment PLSCNT Yes No Last Address Yes Write Reset Command Apply V PPL Programming Completed Flashrite Programming Algorithm Am28F512 No PLSCNT = 25? Yes Apply V PPL Device Failed 11559G-8 ...
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... Data = FFh, resets the register for read operations. Wait for V PP parameters. The V power supply can be hard-wired to the device may be ground, no connect with a resistor tied to ground, or less than V PPL Am28F512 Comments Ramp to V (Note 1) PPH ) WHWH1 Ramp to V (Note 1) PPL + 2 ...
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... This command terminates the programming op- eration on the rising edge of the WE# pulse (section D). The program-verify command also stages the device for data verification (section F). Another software timing routine (6 µs duration) must be executed to allow for Am28F512 Data Out ...
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... Flash memories can be programmed in-system standard PROM programmer. The device may be sol- dered to the circuit board upon receipt of shipment and programmed in-system. Alternatively, the device may initially be programmed in a PROM programmer prior to soldering the device to the board. Am28F512 CC and ...
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... The operation is initiated by writing 80h or 90h into the command register. Following this command, a read cycle address 0000h retrieves the manufacturer code of 01h. A read cycle from address 0001h returns the device code. To terminate the operation necessary to write another valid command, such as Reset (FFh), into the register. Am28F512 ...
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... CC V Voltages PP Read . . . . . . . . . . . . . . . . . . . . . . . . –0 +12.6 V Program, Erase, and Verify . . . . . . +11 +12 –2.0 V for Operating ranges define those limits between which the func- SS tionality of the device is guaranteed. pins is -0 may overshoot PP Am28F512 ). . . . . . . . . . . . + .– + .– +125 ...
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... MAXIMUM OVERSHOOT +0.8 V –0.5 V – 2.0 V 14 Maximum Negative Input Overshoot Maximum Positive Input Overshoot Maximum V Overshoot PP Am28F512 11561G-10 11561G-11 11561G-12 ...
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... Read/Write PP V PPH Operations V Low V Lock-out Voltage LKO CC Notes: 1. Caution: The Am28F512 must not be removed from (or inserted into) a socket when V the voltage difference between V PP time specification of 500 ns minimum tested with simulate open outputs. CC1 IH 3. Maximum active power usage is the sum ...
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... Read/Write PP V PPH Operations V Low V Lock-out Voltage LKO CC Notes: 1. Caution: The Am28F512 must not be removed from (or inserted into) a socket when V the voltage difference between V PP time specification of 500 ns minimum tested with simulate open outputs. CC1 IH 3. Maximum active power usage is the sum ...
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... Figure 5. Am28F512—Average I TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 6. Test Setup Frequency in MHz Active vs. Frequency 5.5 V, Addressing Pattern = Minmax CC Data Pattern = Checkerboard 5.0 V Test Condition Output Load 2.7 k Output Load Capacitance, C ...
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... V for a logic “0”. Input pulse rise and fall times are 10 ns. Parameter Description Min Max Max Max Min Max Min Max Min # Change (Note 2) Min Min Am28F512 Test Points Input Output 11561G-15 Am28F512 -70 -90 -120 -150 -200 70 90 120 150 200 70 90 120 150 200 70 90 120 150 200 ...
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... Min Min Min Min Min Min Min Min Min 100 Min (Note 4) Min 500 PPH (Note 4) Min 500 PPL to Reset (Note 4) Min 100 Am28F512 Am28F512 Speed Options -90 -120 -150 -200 70 90 120 150 200 ...
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... Center Line is High Impedance State (High Z) Data Outputs Valid Enabled Addresses Stable AVAV GLQV ELQV AXQX GLQX OLZ ELQX LZ Output Valid AVQV ACC Am28F512 OUTPUTS Changing, State Unknown Standby, Power-down t EHQZ ( GHQZ ( High Z 11561G-16 ...
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... Erase-Verify Command Erasure Command AVWL WHEH CH t WHWH2 GHWL OES WHWL WPH WHDX DH DATA IN DATA IN = 20h = 20h Am28F512 Erase Standby, Verification Power-down AVAV WLAX EHQZ DF t WHGL GHQZ GLQV GLQX ...
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... Programming and Data Command WLAX WHEH CH t WHWH1 GHWL OES WHWL WPH WHDX DH DATA IN DATA IN = 40h Am28F512 Programming Standby, Verify Verification Power-down AVAV GHQZ DF t WHGL GHQZ GLQV GLQX AXQX ...
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... Excludes system-level overhead Cycles Parameter = 5.0 V, one pin at a time. CC Test Conditions OUT 25° 1.0 MHz. A Test Conditions 150°C 125°C Am28F512 Comments Min Max ) –1 –1 1 –100 mA +100 mA Typ Max Unit ...
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... SEATING PLANE .015 .016 .060 .022 .009 .015 .125 .140 .080 .095 SEATING PLANE .013 .021 .050 REF. Am28F512 .600 .625 .009 .015 .630 .700 0 10 16-038-S_AG PD 032 EC75 5-28-97 lv .042 .056 .400 REF. .490 .530 16-038FPO-5 PL 032 DA79 ...
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... PHYSICAL DIMENSIONS TS032—32-Pin Standard Thin Small Outline Package (measured in millimeters) Pin 1 I.D. 1 1.20 MAX 18.30 18.50 19.80 20. Am28F512 0.95 1.05 7.90 8.10 0.50 BSC 0.05 0.15 0.08 16-038-TSOP-2 0.20 TS 032 DA95 0.10 3-25-97 lv 0.21 0.50 0.70 33 ...
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... PHYSICAL DIMENSIONS TSR032—32-Pin Reversed Thin Small Outline Package (measured in millimeters) Pin 1 I.D. 1 1.20 MAX 34 18.30 18.50 19.80 20.20 0° 5° 0.50 0.70 Am28F512 0.95 1.05 0.17 0.27 7.90 8.10 0.50 BSC 0.05 0.15 16-038-TSOP-2 0.08 TSR032 0.20 DA95 0.10 8-15-96 lv 0.21 ...
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... Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. ExpressFlash is a trademark of Advanced Micro Devices, Inc. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. Am28F512 35 ...