MC74HC4046AFR1 ON Semiconductor, MC74HC4046AFR1 Datasheet

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MC74HC4046AFR1

Manufacturer Part Number
MC74HC4046AFR1
Description
Phase-Locked-Loop
Manufacturer
ON Semiconductor
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC74HC4046AFR1
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
MC74HC4046A
Phase-Locked Loop
High–Performance Silicon–Gate CMOS
gate CMOS device. The device inputs are compatible with standard
CMOS outputs; with pullup resistors, they are compatible with
LSTTL outputs.
comparators, a voltage–controlled oscillator (VCO) and unity gain
op–amp DEM OUT . The comparators have two common signal inputs,
COMP IN , and SIG IN . Input SIG IN and COMP IN can be used directly
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self–bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator
1 (an exclusive OR gate) provides a digital error signal PC1 OUT and
maintains 90 degrees phase shift at the center frequency between
SIG IN and COMP IN signals (both at 50% duty cycle). Phase
comparator 2 (with leading–edge sensing logic) provides digital error
signals PC2 OUT and PCP OUT and maintains a 0 degree phase shift
between SIG IN and COMP IN signals (duty cycle is immaterial). The
linear VCO produces an output signal VCO OUT whose frequency is
determined by the voltage of input VCO IN signal and the capacitor
and resistors connected to pins C1A, C1B, R1 and R2. The unity gain
op–amp output DEM OUT with an external resistor is used where the
VCO IN signal is needed but no loading can be tolerated. The inhibit
input, when high, disables the VCO and all op–amps to minimize
standby power consumption.
frequency synthesis and multiplication, frequency discrimination,
tone decoding, data synchronization and conditioning,
voltage–to–frequency conversion and motor speed control.
March, 2000 – Rev. 7
The MC74HC4046A is similar in function to the MC14046 Metal
The HC4046A phase–locked loop contains three phase
Applications include FM and FSK modulation and demodulation,
No. 7A
Output Drive Capability: 10 LSTTL Loads
Low Power Consumption Characteristic of CMOS Devices
Operating Speeds Similar to LSTTL
Wide Operating Voltage Range: 3.0 to 6.0 V
Low Input Current: 1.0 A Maximum (except SIG IN and COMP IN )
In Compliance with the Requirements Defined by JEDEC Standard
Low Quiescent Current: 80 A Maximum (VCO disabled)
High Noise Immunity Characteristic of CMOS Devices
Diode Protection on all Inputs
Chip Complexity: 279 FETs or 70 Equivalent Gates
Semiconductor Components Industries, LLC, 2000
1
16
16
1. For ordering information on the EIAJ version of the
MC74HC4046AN
MC74HC4046AD
MC74HC4046ADR2
MC74HC4046AF
MC74HC4046AFEL
16
16
SOIC packages, please contact your local ON
Semiconductor representative.
1
1
1
Device
ORDERING INFORMATION
1
A
WL = Wafer Lot
YY = Year
WW = Work Week
http://onsemi.com
CASE 751B
= Assembly Location
SOEIAJ–16
CASE 648
N SUFFIX
D SUFFIX
CASE 966
F SUFFIX
PDIP–16
SO–16
CASE 948F
DT SUFFIX
TSSOP–16
SOIC–EIAJ
SOIC–EIAJ
Publication Order Number:
SOIC–16
SOIC–16
Package
PDIP–16
16
1
MC74HC4046A/D
16
16
MC74HC4046AN
1
1
74HC4046B
DIAGRAMS
MARKING
AWLYWW
AWLYYWW
AWLYWW
HC4046A
16
2500 / Reel
1
2000 / Box
Shipping
See Note
See Note
NO TAG
NO TAG
48 / Rail
ALYW
HC40
46A

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MC74HC4046AFR1 Summary of contents

Page 1

MC74HC4046A Phase-Locked Loop High–Performance Silicon–Gate CMOS The MC74HC4046A is similar in function to the MC14046 Metal gate CMOS device. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC4046A phase–locked ...

Page 2

... Plastic DIP: – from 125 _ C SOIC Package: – from 125 _ C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Î Î Î Î ...

Page 3

... Current (per Package) (VCO disabled) Pins 3, 5 and Pin 9 at GND; Input Leakage at Pins 3 and excluded NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High–Speed CMOS Data Book (DL129/D). [Phase Comparator Section] AC ELECTRICAL CHARACTERISTICS Symbol Parameter ...

Page 4

Comparator Section] AC ELECTRICAL CHARACTERISTICS t PLH , Maximum Propagation Delay, SIG IN /COMP IN to PC3 OUT t PHL (Figure 1) t PLZ , Maximum Propagation Delay, SIG IN /COMP IN Output t PHZ Disable Time to PC2 ...

Page 5

Section] AC ELECTRICAL CHARACTERISTICS Symbol Parameter f/T Frequency Stability with Temperature Changes (Figure 13A VCO Center Frequency (Duty Factor = 50%) (Figure 14A fVCO VCO Frequency Linearity VCO Duty Factor at VCO OUT ...

Page 6

SIG IN , COMP IN INPUTS 50% t PHL 90% PCP OUT , PC1 OUT 50% PC3 OUT OUTPUTS 10% t THL Figure 1. SIG IN 50% INPUT COMP IN 50% INPUT t PLZ t PZL 50% PC2 OUT OUTPUT ...

Page 7

DETAILED CIRCUIT DESCRIPTION Voltage Controlled Oscillator/Demodulator Output The VCO requires two or three external components to operate. These are R1, R2, C1. Resistor R1 and Capacitor C1 are selected to determine the center frequency of the VCO (see typical performance ...

Page 8

Phase Comparators All three phase comparators have two inputs, SIG IN and COMP IN . The SIG IN and COMP IN have a special DC bias network that enables AC coupling of input signals. If the signals are not AC ...

Page 9

Phase Comparator 2 This detector is a digital memory network. It consists of four flip–flops and some gating logic, a three state output and a phase pulse output as shown in Figure 6. This comparator acts only on the positive ...

Page 10

V CC –1 (V) Figure 10. Input Resistance at SIG IN , COMP IN with 1 Self–Bias Point DEMOD OUT 6 =6 ...

Page 11

3 7.0 0 0.5 1.0 1.5 2.0 2.5 V VCOIN (V) Figure 14A. VCO Frequency (f VCO ) as a Function of the VCO Input Voltage (V VCOIN ...

Page 12

pF VCOIN = 1 FOR 4.5 V AND 6 VCOIN = 1 FOR 3 amb = ...

Page 13

R1=3.0 k R1= R1=20 k R1= R1=40 k R1=50 k 5.0 R1=100 k C1=39 pF R1=300 1 Figure 22. R2 versus f max ...

Page 14

APPLICATION INFORMATION The following information is a guide for approximate values of R1, R2, and C1. Figures 19, 20, and 21 should be used as references as indicated below, also the values of R1, R2, and C1 should not violate ...

Page 15

G K –T – SEATING PLANE 0.25 (0.010 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. ...

Page 16

... CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit– ...

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