AD7893 Analog Devices, AD7893 Datasheet
AD7893
Specifications of AD7893
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AD7893 Summary of contents
Page 1
... The part accepts an analog input range (AD7893-10), 2.5 V (AD7893-3 (AD7893- +2.5 V (AD7893-2) and operates from a single +5 V supply, consuming only 25 mW typical. The AD7893 is fabricated in Analog Devices’ Linear Compat- ...
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... Input Low Voltage, V 0.8 INL Input Current Input Capacitance LOGIC OUTPUTS Output High Voltage, V 4.0 OH Output Low Voltage, V 0.4 OL Output Coding AD7893-10, AD7893-3 AD7893-2, AD7893-5 CONVERSION RATE Conversion Time 6 2 Track/Hold Acquisition Time 1.5 POWER REQUIREMENTS Power Dissipation 45 ...
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... AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0 DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0 Analog Input Voltage to AGND AD7893-10, AD7893 AD7893-2, AD7893 –5 V, +10 V Reference Input Voltage to AGND . . . –0 Digital Input Voltage to DGND . . . . . –0 Digital Output Voltage to DGND . . . . –0 Operating Temperature Range Commercial (A, B Versions – +85 C Extended (S Version – ...
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... SCLK Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7893. A new serial data bit is clocked out on the rising edge of this serial clock, and data is valid on the falling edge. The serial clock input should be taken low at the end of the serial data transmission. ...
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... LSB. Negative Full-Scale Error (AD7893-10) This is the deviation of the first code transition ( 000 001) from the ideal –4 REF LSB (AD7893- range) after Bipolar Zero Error has been adjusted out. nfb where Negative Full-Scale Error (AD7893-3) This is the deviation of the first code transition ( 000 001) from the ideal (– ...
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... AD7893-10/AD7893-5 Figure 2. AD7893-10/AD7893-3/AD7893-5 Analog Input Structure amplifier. For the AD7893-10 7.5 k and For the AD7893- 6 and R3 is open circuit. For the AD7893-5, R1 and while R2 is open-circuit. For the AD7893-10 and AD7893-3, the designed code transi- tions occur on successive integer LSB values (i ...
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... AD7893 during conversion or after conversion; how- ever, applications that want to achieve optimum performance from the AD7893 will have to ensure that the data read does not occur during conversion or during 600 ns prior to the rising edge of CONVST. This can be achieved in two ways. The first is to ensure in software that the read operation is not initiated until 6 s after the rising edge of CONVST ...
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... The serial clock input does not have to be continuous during the serial read operation. The sixteen bits of data (four leading zeros and 12 bit conversion result) can be read from the AD7893 in a number of bytes; however, the SCLR input must remain low be- tween the two bytes ...
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... AD7893. A simple AND function on this port bit and the serial clock from the 68HC11 will provide this function ...
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... ADC. The rms noise performance for the AD7893-2 for the above plot was 87 V. Since the analog input range, and hence LSB size, on the AD7893-10 is eight times what it is for the AD7893-2, the same output code distribution results in an out- put rms noise of 700 V for the AD7893-10 ...
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... AD7893. The histogram plot for 8192 conversions of the same dc input now shows a larger spread of codes with the rms noise for the AD7893-2 increasing to 210 V. This ef- fect will vary depending on where the serial clock edges appear with respect to the bit trials of the conversion process pos- ...
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... AD7893 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic DIP (N- 0.280 (7.11) PIN 1 0.240 (6.10 0.325 (8.25) 0.430 (10.92) 0.300 (7.62) 0.348 (8.84) 0.060 (1.52) 0.210 0.015 (0.38) (5.33) MAX 0.130 0.015 (0.381) 0.160 (4.06) (3.30) 0.008 (0.204) 0.115 (2.93) MIN SEATING 0.100 0.022 (0.558) 0.070 (1.77) PLANE (2.54) 0.045 (1.15) 0.014 (0.356) BSC Cerdip (Q-8) ...