SSM2275 Analog Devices, SSM2275 Datasheet
SSM2275
Available stocks
Related parts for SSM2275
SSM2275 Summary of contents
Page 1
... The SSM2275 and SSM2475 are specified over the extended industrial (– +85 C) temperature range. The SSM2275 is available in 8-lead plastic DIPs, SOICs, and microSOIC surface- mount packages. The SSM2475 is available in narrow body SOICs and thin shrink small outline (TSSOP) surface-mount packages ...
Page 2
... SSM2275/SSM2475–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio A VO OUTPUT CHARACTERISTICS Output Voltage, High Output Voltage, Low Output Short Circuit Current Limit POWER SUPPLY Power Supply Rejection Ratio ...
Page 3
... C A THD kHz GBW kHz > 1 kHz > 1 kHz n –3– SSM2275/SSM2475 Min Typ Max 250 400 300 500 125 0 4.2 4.5 + ...
Page 4
... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the SSM2275/SSM2475 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
Page 5
... FREQUENCY – Hz Figure 4. Phase/Gain vs. Frequency 2 15V 1.8 A 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 10 100 1k FREQUENCY – Hz Figure 5. SSM2275 Current Noise Density vs. Frequency REV. A Typical Characteristics–SSM2275/SSM2475 225 15V 180 C = 10pF 50 L 135 –45 –90 ...
Page 6
... SSM2275/SSM2475 SSM2275/SSM2475–Typical Characteristics –100 –110 –120 –130 –140 –150 –160 FREQUENCY – kHz Figure 9. THD vs. Frequency (FFT) 0 20mV Figure 10. Small Signal Response 2 + 100 mV p 20mV Figure 11. Small Signal Response 2 + 100 mV p-p ...
Page 7
... C = 100 pF, Figure 19. Small Signal Response 38.0mV 0 200ns = 200 pF, Figure 20. Small Signal Response –7– SSM2275/SSM2475 43.0mV 0 0 20mV 200ns = + 100 mV p 10.5mV 0 0 20mV 100ns = 600 , +1, V ...
Page 8
... SSM2275/SSM2475–Typical Characteristics 0 20mV Figure 21. Small Signal Response + 100 mV p 20mV Figure 22. Small Signal Response + 100 mV p 20mV Figure 23. Small Signal Response + 100 mV p 29.0mV 0 200ns = 600 , C = 200 pF, Figure 24. Small Signal Response ...
Page 9
... Input Overvoltage Protection The maximum input differential voltage that can be applied to the SSM2275/SSM2475 pair of internal back-to-back Zener diodes are connected across the input terminals. This prevents emitter-base junction breakdown from occurring to the input transistors, Q1 and Q2, when very large differential volt- ages are applied. If the device’ ...
Page 10
... It is good practice to place higher power devices away from the more sensitive circuits. When in doubt, measure the temperature in the vicinity of the SSM2275 with a thermocouple thermometer. Maximizing Low Distortion Performance Because the SSM2275/SSM2475 is a very low distortion amplifier, careful attention should be given to the use of the device to prevent inadvertently introducing distortion ...
Page 11
... The S test circuit used to measure the settling time of the SSM2275/ SSM2475 is shown in Figure 32. This test method has advan- tages over false-sum node techniques of measuring settling times in that the actual output of the amplifier is measured, instead of an error voltage at the sum node ...
Page 12
... SSM2275/SSM2475 Capacitive Loading The output of the SSM2275/SSM2475 can tolerate a degree of capacitive loading. However, under certain conditions, a heavy capacitive load could create excess phase shift at the output and put the device into oscillation. The degree of capacitive loading is dependent on the gain of the amplifier. At unity gain, the am- plifier could become unstable at loads greater than 600 pF ...
Page 13
... NOTE: ADDITIONAL PIN CONNECTIONS OMITTED FOR CLARITY 29 LMIC Figure 40. A High Performance I-V Converter for a 20-Bit DAC 35/36 + Figure 41, the SSM2275 is used as a low-pass filter for one CC 0.1 F 34/37 channel of the AD1855, a 24-bit 96 kHz stereo sigma-delta GND DAC, which uses a complementary voltage output. The filter is ...
Page 14
... SSM2275/SSM2475 SPICE Macro-model The SPICE macro-model for the SSM2275 is shown in Listing 1 on the following page. This model is based on typical values for the device and can be downloaded from Analog Devices’ Internet site at www.analog.com. The model uses a common emitter output stage to provide rail-to-rail performance. A resis- tor and dc voltage source, in series with the collector, accurately portray output dropout voltage versus output current ...
Page 15
... Listing 1: SSM2275 SPICE Macro-Model * SSM2275 SPICE Macro-Model Typical Values * 8/97, Ver TAM / ADSC * * Node assignments * non-inverting input * | inverting input * | | positive supply * | | | * | | | * | | | * | | | .SUBCKT SSM2275 INPUT STAGE * QNIX QNIX RC1 99 11 15E3 RC2 99 12 15E3 RE1 5 8 1E3 RE2 ...
Page 16
... SSM2275/SSM2475 8-Lead SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80 0.1574 (4.00) 0.2440 (6.20 0.1497 (3.80) 0.2284 (5.80) PIN 1 0.0688 (1.75) 0.0098 (0.25) 0.0532 (1.35) 0.0040 (0.10) 0.0500 0.0192 (0.49) SEATING 0.0098 (0.25) (1.27) 0.0138 (0.35) PLANE BSC 0.0075 (0.19) 8-Lead Plastic DIP (N-8) 0.430 (10.92) 0.348 (8.84 0.280 (7.11) 0.240 (6.10 0.060 (1.52) PIN 1 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) 0.160 (4.06) MIN ...