HN29W25611T-50H Renesas Electronics Corporation., HN29W25611T-50H Datasheet
HN29W25611T-50H
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HN29W25611T-50H Summary of contents
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... HN29W25611T-50H 256M AND type Flash Memory More than 16,057-sector (271,299,072-bit) Description The Hitachi HN29W25611T is a CMOS Flash Memory with AND type multi-level memory cells. It has fully automatic programming and erase capabilities with a single 3.3 V power supply. The functions are controlled by simple external commands. To fit the I/O card applications, the unit of programming and erase is as small as (2048 + 64) bytes ...
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... A (max) (Deep standby) SB3 The following architecture is required for data reliability. Error correction: more than 3-bit error correction per each sector read Spare sectors: 1.8% (290 sectors) within usable sectors Ordering Information Type No. Available sector HN29W25611T-50H More than 16,057 sectors 2 Package 2 12.0 18.40 mm 0.5 mm pitch ...
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... Pin Description Pin name I/ CDE RDY/Busy RES SC NC Note: 1. All V and V pins should be connected to a common power supply and a ground, respectively HN29W25611T-50H 48-pin TSOP CDE RES ...
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... HN29W25611T-50H Block Diagram Sector address buffer • • I/O0 • • to Multiplexer • • I/O7 • • RDY/Busy Read/Program/Erase control Control WE signal SC buffer RES CDE 4 2048 + 64 X-decoder 16384 memory matrix Data register (2048 + 64) Data Input • • Y-gating input data • ...
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... Control bytes I/O0 I/O1 I/O2 I/O3 I/ A10 A11 A12 A10 A11 HN29W25611T-50H Column address I/O5 I/O6 I/ A13 * referred ...
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... HN29W25611T-50H Pin Function CE used to select the device. The status returns to the standby at the rising edge the reading operation. However, the status does not return to the standby at the rising edge the busy state in programming and erase operation. OE: Memory data and status register data can be read, when WE: Commands and address are latched at the rising edge of WE ...
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... Write 1FH 7 4 Write 0FH Write 11H 2h* Write 11H 1 Write FFH 1 Write 50H 4 Write 12H HN29W25611T-50H Second bus cycle Operation Data in Data out mode 4 Write SA (1)* 4 Write SA (1)* 4 Write SA (1 Read ID* Read Recovery data 4 Write SA (1)* 4 Write ...
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... HN29W25611T-50H Command Read Serial read (1) (Without CA) 3 (With CA) Serial read (2) Read identifier codes Data recovery read Auto erase Single sector Auto program Program (1) (Without 7 CA* ) (With CA* 10 Program (2)* Program (3) (Control bytes)* Program (4) (WithoutCA* (With CA* Reset Clear status register Data recovery write ...
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... Write CA (2 2h* Write CA (2 2h* Write CA ( IHR HN29W25611T-50H Sixth bus cycle Operation Data in mode *11, 12 Write 40H *11, 12 Write 40H first time after the power up. h 2048 + 64). 9 ...
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... HN29W25611T-50H Mode Description Read Serial Read (1): Memory data D0 to D2111 in the sector of address SA is sequentially read. Output data is not valid after the number of the SC pulse exceeds 2112. When CA is input, memory data D ( the sector of address SA is sequentially read. Then output data is not valid after the number of the SC pulse exceeds (2112 to m) ...
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... CDE V 16383 Sector Sector address address Memory array 0 0 2111 Column address Register Serial read (1) (With CA) Program (1) (With CA) and V , respectively HN29W25611T-50H 16383 Memory array 0 0 2048 2111 Register Serial read (2) Program ( the status IL 11 ...
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... HN29W25611T-50H Data Recovery Read When the programming was an error, the program data can be read by using data recovery read. When an additional programming was an error, the data compounded of the program data and the origin data in the sector address SA can be read. Output data are not valid after the number of SA pulse exeeds 2112. The mode turns back to the standby mode at any time when are latched at a rising edge of WE pulse after the data recovery read command is written ...
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... Serial Read (1) (Without CA), (2) Command/Address 00H/F0H CDE WE Low SC Single Sector Erase Command/Address CDE (1) CA (2) Data output CA (1) CA (2) Data output SA (1) SA (2) 20H SA (1) SA (2) Low HN29W25611T-50H CA (1)' CA (2)' Data output CA (1)' CA (2)' Data output Data output B0H Erase start 13 ...
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... HN29W25611T-50H Program (1), (4) (With CA before SC) Command 10H/11H SA (1) SA (2) /Address CDE WE Low SC Program (1), (4) (With CA after SC) Command 10H/11H SA (1) SA (2) /Address CDE WE Low SC Data input Program (1), (4) (Without CA) Command/Address 10H/11H CDE WE SC Low Program (2) Command/Address 1FH CDE WE SC Low 14 CA (1) CA (2) ...
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... Data Recovery Read Mode Command/Address Data Recovery Write Mode Command/Address CDE (1) SA (2) Data input 90H Manufacture Device code code output output 01H CDE WE SC Low Data output 12H SA (1) SA (2) Low HN29W25611T-50H 40H Program start Manufacture code output 40H Program start 15 ...
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... HN29W25611T-50H Status Transition V Deep CC Power off standby RES 00H/F0H Read (1) / (2) setup FFH CE 90H ID read setup FFH CE 20H Sector Erase setup FFH 10H CE Output /11H Program Standby disable (1)/(4) setup FFH 1FH /0FH Program (2)/(3) setup FFH Status register clear 2 CE* ...
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... Vin, Vout –0 Topr 0 to +70 Tstg –65 to +125 Tbias –10 to +80 20 ns. Symbol Min Typ Max Unit Cin — — Cout — — HN29W25611T-50H Unit Notes ˚C ˚C 3 ˚C Test conditions Vin = 0 V Vout = ...
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... HN29W25611T-50H DC Characteristics (V = 3 +70˚C) CC Parameter Symbol Min Input leakage current I LI Output leakage current I LO Standby V current I CC SB1 I SB2 Deep standby V current I CC SB3 Operating V current I CC CC1 I CC2 Operating V current (Program CC3 Operating V current (Erase ...
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... — — — — — — — — ns — — 200 — — — — — — ns HN29W25611T-50H Notes , ...
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... HN29W25611T-50H Parameter Symbol SC setup for hold time for OE t COH SA ( (2) delay time t SCD RDY/Busy setup for Time to device busy on read t DBR mode Busy time on reset mode t RBSY Notes time after which the I/O pins become open. ...
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... SPL Data setup time for SC t SDS Data hold time for SC t SDH SC setup for setup for CE t SCS SC hold time for WE t SCHW HN29W25611T-50H Min Typ Max Unit Test conditions 120 — — — — — ...
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... HN29W25611T-50H Parameter Symbol CE to output delay output delay high to output float t DF RES to WE setup time t RP CDE setup time for WE t CDS CDE hold time for WE t CDH CDE setup time for SC t CDSS CDE hold time for SC ...
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... RDY/Busy outputs the Undefined CEH CESR RP CES BSY Ready High-Z level referred to DC characteristics at the rising and falling edges of V level referred to DC characteristics while I/O7 outputs the V level. OL HN29W25611T-50H t t CEH CESR t CWRH t t VRH DFP level in the OL 23 ...
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... HN29W25611T-50H Serial Read (1) (2) Timing Waveform CE t CES CWC CWC WPH WPH OEWS WE t CDS CDS CDE t CDH SCS I/O0 to I/O7 00H SA(1) SA(2) /F0H RES DBR RDY /Busy Notes: 1. The status returns to the standby at the rising edge of CE. ...
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... CEH CWC OEPS t WPH CDS t CDH t t CDH SCHW IO7 = V SA(2) B0H HN29W25611T-50H COH t 4 CPH * t CEH t t CDH SOH SCC * t CDS SAC SAC SAC ...
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... HN29W25611T-50H Program (1) and Status Data Polling Timing Waveform CE t CES OEWS CWC CWC t t WPH WPH CDS WP CDS WP WP CDE t CDH SCS I/O0 to I/O7 10H SA (1) SA (2) RES t High-Z RP RDY /Busy Notes: 1. The programming operation is not guranteed when the number of the SC pulse exceeds 2112. ...
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... CDSH CDH * SPL t SPL SDH SDH SDS 1 PD1 CA(1) CA(2) PD(m) PD(m+1) PD(m+j)* PD(k 2048 + 64) HN29W25611T-50H CEH CE COS t t OEPS OE t RDY CDS WP ASP SCC CDH SPL SCHW SDH ...
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... HN29W25611T-50H Program (2) and Status Data Polling Timing Waveform CE t CES OEWS CWC CWC t t WPH WPH CDS WP CDS WP WP CDE t CDH SCS I/O0 to I/O7 1FH SA (1) SA (2) RES t High-Z RP RDY /Busy Notes: 1. The programming operation is not guranteed when the number of the SC pulse exceeds 2112. ...
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... By using program (3), the data can be programmed additionally for each sector before erase. t CEH t OEPS t t CDSS SCC CDH CDH t t SCHW SPL SDH SDS PD2048 PD2049 PD2111 40H HN29W25611T-50H t COS RDY OE t ASP CDS High ...
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... HN29W25611T-50H Program (4) and Status Data Polling Timing Waveform CE t CES OEWS CWC CWC t t WPH WPH CDS CDS WP WP CDE t CDH SCS I/O0 to I/O7 11H SA (1) SA (2) RES t DBR t RP RDY /Busy Notes: 1 ...
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... CDSH CDH * SPL t SPL SDH SDH SDS 1 PD1 CA(1) CA(2) PD(m) PD(m+1) PD(m+j)* PD(k High 2048 + 64) HN29W25611T-50H CEH CE COS t t OEPS OE t RDY t CDS ASP SCC CDH SPL * SCHW ...
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... HN29W25611T-50H ID and Status Register Read Timing Waveform CE t CES OEWS OEPS CDH CDS WP CDE t SCHW SCS DS OE I/O0 to I/O7 Manufacturer 90H code RES t RP RDY /Busy Note: 1. The status returns to the standby at the rising edge of CE ...
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... After any commands are written, the status can turns to the standby after the command FFH is input and CE turns to the V level CPH t COH t CWHR CDOS SOH SCC SCC SPL SAC SAC SAC SAC D0out D1out D2111out High High-Z HN29W25611T-50H CEH CDH t CDS FFH * 33 ...
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... HN29W25611T-50H Data Recovery Write Timing Waveform CE t CES CWC CWC WPH WPH OEWS WE t CDS CDS CDE t CDH SCS DS AS I/O0 to I/O7 12H SA(1) RES t RP High-Z RDY /Busy Notes: 1. Any commands,including reset command FFH, cannot be input while RDY/Busy ...
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... DS DH I/O0 to I/O7 50H RES High High-Z RDY /Busy Note 1. The status returns to the standby at the rising edge of CE. t CWH t WWH t CDS t CDH Next Command HN29W25611T-50H CPH t CES t OEWS t CDS t t CDH WP t SCS tDS tDH Next Command 35 ...
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... HN29W25611T-50H Function Description Status Register: The HN29W25611T outputs the operation status data as follows: I/O7 pin outputs a V indicate that the memory is in either erase or program operation. The level of I/O7 pin turns the operation finishes. I/O5 and I/O4 pins output V complete in a finite time, respectively. If these pins output V out ...
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... Notes: 1. Refer to table "Initial data of usable sectors". 2. Bad sectors are installed in system. 821H 822H 823H 824H 71H C7H 1CH 71H START Sector number = 0 Read data Column address = 820H to 825H Check data* Yes No Sector number = 16,383 Yes END Indication of Unusable Sectors HN29W25611T-50H 825H 826H to 83FH C7H FFH 37 ...
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... HN29W25611T-50H Requirements for High System Reliability The device may fail during a program, erase or read operation due to write or erase cycles. The following architecture will enable high system reliability if a failure occurs. 1. For an error in read operation: An error correction more than 3-bit error correction per each sector read is required for data reliability ...
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... Check RDY/Busy No Check status Yes Clear status register Load data from external buffer Check status: Status register read END Spare Sectors in Program Error HN29W25611T-50H Data recovery read Data recovery write Set another Program start usable sector Program end Check RDY/Busy No Check status ...
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... HN29W25611T-50H Memory Structure 2,112 bytes (16,896 bits) Bit: Minimum unit of data. Byte: Input/output data unit in programming and reading. (1 byte = 8 bits) Sector: Page unit in erase, programming and reading. (1 sector = 2,112 bytes = 16,896 bits) Device: 1 device = 16,384 sectors. 40 bit sector byte (8 bits) ...
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... Package Dimensions HN29W25611T Series (TFP-48D) 12.00 12.40 Max 0.50 *0.22 0.08 0.08 M 0.20 0.06 0.45 Max 0.10 *Dimension including the plating thickness Base material dimension 25 20.00 0.20 Hitachi Code JEDEC EIAJ Mass (reference value) HN29W25611T-50H Unit: mm 0.80 0 – 5 0.50 0.10 TFP-48D Conforms Conforms 0. ...
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... HN29W25611T-50H Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...