LX1725ILQ Microsemi Analog Mixed Signal Group, LX1725ILQ Datasheet - Page 9

IC AMP AUDIO 32W STER D 32MLPQ

LX1725ILQ

Manufacturer Part Number
LX1725ILQ
Description
IC AMP AUDIO 32W STER D 32MLPQ
Manufacturer
Microsemi Analog Mixed Signal Group
Series
AudioMAX™r
Type
Class Dr
Datasheet

Specifications of LX1725ILQ

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Max Output Power X Channels @ Load
32W x 1 @ 8 Ohm; 16W x 2 @ 4 Ohm
Voltage - Supply
12 V ~ 35 V, ±6 V ~ 17.5 V
Features
Depop, Differential Inputs, Mute, PWM, Short-Circuit and Thermal Protection, Standby
Mounting Type
Surface Mount
Package / Case
32-MLPQ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Copyright © 2004
Rev. 1.2, 2005-12-06
O
LX1725 has a fixed PWM modulation frequency, but it is
programmable by using an external capacitor connected to C
pin to GND. The switching frequency is approximately 235KHz
with capacitor’s value 220pF. With the capacitor value given, the
switching frequency can be calculated as follows:
F
F
The suggested switching frequency is 250KHz
S
P
At start up or upon recovery from a fault condition, an internal
“hiccup” counter counts 65536 clock cycles before allowing the
outputs to begin switching. See the POR timing sequence in
Figure 3.
Two or more LX1725 oscillators can be configured for
synchronous operation. One unit, the master, is programmed for
the desired frequency with C
pin tied to V5V. The SYNC pin and the C
units should be tied to the SYNC pin and the C
master unit respectively. The MASTER pin of slave components
is tied to GND. In this configuration, the SYNC pins of the slave
units begin receiving instead of transmitting clock pulses. Also,
the C
Note that for optimum performance, all slave units should be
located as close to the master unit as possible (Figure 2).
OSC
OSC
YNCHRONIZATION
OWER
SCILLATOR
Figure 2 – Two Devices Synchronized Block Diagram
= 52000 / C
in KHz, and C
OSC
O
TM
pins quit driving the PWM capacitor in the slave units.
N
R
ESET
OSC
(POR)
OSC
in pF.
SYNC
SYNC
Cosc
Cosc
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
OSC
LX1725
LX1725
(Master)
(Slave)
as usual, also with the MASTER
Master
Master
F U N C T I O N D E S C R I P T I O N
OSC
pin of the slave
OSC
Integrated Products Division
V5V
pin of the
®
Microsemi
OSC
The MASTER pin, as mentioned in S
multi devices operation. It is also a Quad-level control pin with
three thresholds to enable Master/Slave and the “Quick” test mode.
Quick mode forces the internal 65536 clock counter to be
bypassed in order to speed-up production testing; this is usually for
factory production test purposes.
G
The channel gain can be programmed between 26dB and 20dB by
setting the HIGAIN pin to V5V or to GND. The MUTE pin is a
Tri-level control pin for test purposes. When this pin is set to
greater than V5V/2, the audio signal path is muted. For voltages
between V5V/4 and V5V/2, the audio gain will be reduced by
6dB. This allows the “Low Gain” mode to be tested. For voltages
less than V5V/4, the normal gain is in place (Figure 4).
AIN
S
Figure 3 – Power-On-Reset Timing Sequence
ELECTION
< V5V/4
< V5V/2, >V5V/4
< 3*V5V/4, >V5V/2
> 3*V5V/4
Figure 4 – Gain Selection Block Diagram
15W+15W Stereo Class-D Amplifier
2R
V @ Master
R
V5V
Filterless 30W Mono in BTL
/M
P
14dB
20dB
MUTE
RODUCTION
UTE
STBY
65536 clock cycles
err amp
Slave, Normal Mode
Slave, Quick mode
Master, Quick mode
Master, Normal mode
14dB
MUTE
D
FLAG
YNCHRONIZATION
ATA
LX1725
(Master)
Mode
S
HEET
Output PWM
, is for
LX1725
Page
9

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