MT90820AP Mitel, MT90820AP Datasheet

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MT90820AP

Manufacturer Part Number
MT90820AP
Description
6.0V; 40mA; large digital switch (LDX). For meduim and large switching platforms
Manufacturer
Mitel
Datasheet
1.MT90820AP.pdf (10 pages)

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Features
•
•
•
•
•
•
•
•
•
•
•
•
Applications
•
•
•
•
•
•
STi0
STi1
STi2
STi3
STi4
STi5
STi6
STi7
STi8
STi9
STi10
STi11
STi12
STi13
STi14
STi15
2,048 channel non-blocking switch
Maintains frame integrity on concatenated
channels.
Per-channel selection of minimum or constant
throughput delay
Serial streams at 2.048, 4.096 or 8.192Mb/s
Frame offset delay measurement
Programmable frame delay offset
Per-channel three-state control
Per-channel message mode
Control interface compatible to Intel/Motorola
CPUs
Block programming feature for connection
memory
ST-BUS/MVIP and GCI interfaces
Test Port compatible to IEEE-1149.1 standard
Medium and large switching platforms
C.O. switches
CTI application
Voice/data multiplexer
Digital cross connects
ST-BUS/HMVIP interface functions
V
DD
CLK
Converter
Parallel
Serial
V
to
SS
FRM FE/
Timing
Unit
HCLK
HMVIP
TMS
Figure 1 - Functional Block Diagram
ALE
AS/ IM DS
TDI
Multiple Buffer
Data Memory
Microprocessor Interface
TDO
Registers
Internal
RD
Test Port
TCK TRSTB
CS R/W
CMOS ST-BUS
WR
Description
The Large Digital Switch (LDX) is an advanced
digital switch allowing the users to build up to 2048
channel non-blocking switch. The serial interface can
be at 2, 4 or 8 Mb/s compatible to ST-BUS/MVIP/
HMVIP or GCI standards. The LDX can be
programmed to provide either minimum or constant
throughput delay on all its channels. The device also
features three-state control and message mode on
per-channel basis.
To manage the problem of line delays, each input
stream can have an individually programmed input
frame offset delay. The offset delay can be calibrated
with a dedicated frame measurement facility inside
the device.
A7-A0
TEST RESETB
Output
Connection
MUX
Memory
DTA D15-D8/
MT90820AP
MT90820AL
Large Digital Switch (LDX)
AD7-AD0
Ordering Information
-40 to +85°C
FAMILY
CSTo
ISSUE 1
Advance Information
Converter
Parallel
Serial
ODE
to
84 Pin PLCC
100 Pin QFP
MT90820
STo0
STo1
STo2
STo3
STo4
STo5
STo6
STo7
STo8
STo9
STo10
STo11
STo12
STo13
STo14
STo15
May 1995
2-179

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MT90820AP Summary of contents

Page 1

... Microprocessor Interface AS R/W DTA D15-D8/ A7-A0 ALE RD WR Figure 1 - Functional Block Diagram MT90820 FAMILY Large Digital Switch (LDX) Advance Information ISSUE 1 Ordering Information MT90820AP 84 Pin PLCC MT90820AL 100 Pin QFP -40 to +85°C ODE STo0 STo1 STo2 Parallel STo3 STo4 to STo5 STo6 ...

Page 2

MT90820 CMOS STi0 12 STi1 STi2 14 STi3 STi4 16 STi5 STi6 18 STi7 STi8 20 STi9 STi10 22 STi11 STi12 24 STi13 STi14 26 STi15 FRM 28 FE/HCLK VSS 30 CLK VDD STi0 STi1 82 ...

Page 3

Advance Information Pin Description Pin # Name 84 100 1, 11, 31, V Ground. SS 30, 54 41, 64, 75 56, 66, 76 32 Volt Power Supply 68-75 ...

Page 4

MT90820 CMOS Pin Description Pin # Name 84 100 52 25 AS/ALE Address Strobe or Latch Enable: This input is only used if multiplexed bus is selected CPU Interface Mode (input): If High, this input selects the ...

Page 5

... ST-BUS and GCI formats. The input and output streams accept identical data rates only. By using Mitel message mode capability, the microprocessor can access input and output time- slots on a per channel basis to control external circuits or other ST-BUS devices. Two different ...

Page 6

MT90820 CMOS Serial Data Interface The master clock (CLK) can be either at 4.096, 8.192 or 16.384 MHz allowing serial data link operation at 2.048, 4.096 and 8.192 Mb/s respectively. The master clock frequency is always twice the data rate. ...

Page 7

Advance Information that a valid offset measurement is ready to be read from the FAR register. This feature is not available when the HMVIP interface is enabled, i.e. when HMVIP pin is tied Memory Block Programming ...

Page 8

MT90820 CMOS ...

Page 9

Advance Information Absolute Maximum Ratings* Parameter 1 Supply Voltage 2 Voltage on any pin I/O (other than supply pins) 3 Current at digital outputs 4 Package power dissipation 5 Storage temperature * Exceeding these figures may cause permanent damage. Functional ...

Page 10

MT90820 CMOS NOTES: 2-188 Advance Information ...

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