W27C512P-70 Winbond, W27C512P-70 Datasheet

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W27C512P-70

Manufacturer Part Number
W27C512P-70
Description
64K*8 bits high speed, low power electrically erasable EPROM
Manufacturer
Winbond
Datasheet

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GENERAL DESCRIPTION
The W27C512 is a high speed, low power Electrically Erasable and Programmable Read Only
Memory organized as 65536
provides an electrical chip erase function.
FEATURES
PIN CONFIGURATIONS
High speed access time:
45/70/90/120 nS (max.)
Read operating current: 30 mA (max.)
Erase/Programming operating current
30 mA (max.)
Standby current: 1 mA (max.)
Single 5V power supply
A1
A0
NC
Q0
A6
A5
A4
A3
A2
GND
A15
A12
Q0
Q1
Q2
A6
A5
A4
A3
A2
A1
A0
A7
5
6
7
8
9
10
11
12
13
64K
1
4
A
7
Q
1
4 3 2 1 3
1
9
10
11
12
13
14
2
3
4
5
6
7
8
A
1
2
1
5
Q
2
1
6
G
N
D
A
1
5
32-pin
PLCC
28-pin
DIP
N
C
1
7
N
C
V
C
C
1
8
2
Q
3
A
1
4
1
9
Q
4
3
1
19
18
17
15
28
27
26
25
24
23
22
21
20
8 ELECTRICALLY ERASABLE EPROM
16
A
1
3
2
0
Q
5
3
0 29
22
28
27
26
25
24
23
21
8 bits that operates on a single 5 volt power supply. The W27C512
OE/Vpp
Q7
A14
A13
A8
A9
A11
A10
CE
Q6
Q5
Q4
Q3
V
CC
A11
NC
A10
A8
A9
OE/Vpp
CE
Q7
Q6
- 1 -
BLOCK DIAGRAM
PIN DESCRIPTION
+14V erase/+12V programming voltage
Fully static operation
All inputs and outputs directly TTL/CMOS
compatible
Three-state outputs
Available p
32-pin PLCC
SYMBOL
A0 A15
OE /V
Q0 Q7
GND
V
CE
NC
CC
OE/V
PP
GND
Publication Release Date: November 1999
A15
CE
V
A0
.
.
PP
CC
ackages: 28-pin 600 mil DIP, 330 mil
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable, Program/Erase
Supply Voltage
Power Supply
Ground
No Connection
CONTROL
DECODER
DESCRIPTION
OUTPUT
BUFFER
ARRAY
CORE
W27C512
Revision A4
Q0
Q7
.
.

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W27C512P-70 Summary of contents

Page 1

ELECTRICALLY ERASABLE EPROM GENERAL DESCRIPTION The W27C512 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65536 provides an electrical chip erase function. FEATURES High speed access time: 45/70/90/120 nS (max.) Read ...

Page 2

FUNCTIONAL DESCRIPTION Read Mode Like conventional UVEPROMs, the W27C512 has two control functions, both of which produce data at the outputs for power control and chip select. OE/V to the output pins. When addresses are stable, the address ...

Page 3

Standby Mode The standby mode significantly reduces V mode, all outputs are in a high impedance state, independent Two-line Output Control Since EPROMs are often used in large memory arrays, the W27C512 provides two control inputs for ...

Page 4

DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Operation Temperature Storage Temperature Voltage on all Pins with Respect to Ground Except OE/V A9 and V Pins CC Voltage on OE/V Pin with Respect to Ground PP Voltage on A9 Pin with Respect ...

Page 5

CAPACITANCE ( MHz PARAMETER Input Capacitance Output Capacitance AC CHARACTERISTICS AC Test Conditions PARAMETER Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Output ...

Page 6

READ OPERATION DC CHARACTERISTICS (V = 5.0V 5 PARAMETER SYM. Input Load Current I LI Output Leakage Current I LO Standby V Current (TTL input) Standby V Current I ...

Page 7

DC Programming Characteristics, continued PARAMETER Input Low Voltage Input High Voltage Output Low Voltage (Verify) Output High Voltage (Verify) A9 Silicon I.D. Voltage V Program Voltage PP V Supply Voltage (Program PROGRAMMING/ERASE CHARACTERISTICS (V = 5.0V 5%, T ...

Page 8

TIMING WAVEFORMS AC Read Waveform V IH Address OE/Vpp V IL High Z Outputs Erase Waveform Read Read Company Device SID SID A9 = 12.0V Others = ...

Page 9

Timing Waveforms, continued Programming Waveform V IH Address Stable Address Data Data In Stable 12.0V OE/Vpp OES PRT T PWP ...

Page 10

SMART PROGRAMMING ALGORITHM 1 No Increment Address Increment Address No Last Address? Yes Start Address = First Location Vcc = 5.0V OE/Vpp = 12V Program One 100 S Pulse Last Address? Yes Address = First Location Pass ...

Page 11

SMART PROGRAMMING ALGORITHM 2 Increment Address Start Address = First Location Vcc = 5. Program One 100 S Pulse OE/V = 12V PP Increment X Yes X = 25? No Fail Verify One Byte OE ...

Page 12

SMART ERASE ALGORITHM Increment Address Start Vcc = 5V OE/Vpp = 14V A9 = 14V Chip Erase 100 mS Pulse Address = First Location Increment X Vcc = 3.75V OE/Vpp = V IL ...

Page 13

... W27C512-70 70 W27C512-90 90 W27C512-12 120 W27C512P-45 45 W27C512P-70 70 W27C512P-90 90 W27C512P-12 120 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. ...

Page 14

PACKAGE DIMENSIONS 28-pin P-DIP 32-pin PLCC Seating Plane 1 G ...

Page 15

... TEL: 852-27513100 FAX: 852-27552064 - 15 - W27C512 DESCRIPTION ) from 2.0 (min) to 2.2 (max) IH and Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798 Publication Release Date: November 1999 Revision A4 ...

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