N80C152JA Intel Corporation, N80C152JA Datasheet
![no-image](/images/manufacturer_photos/0/3/337/intel_corporation_sml.jpg)
N80C152JA
Available stocks
Related parts for N80C152JA
N80C152JA Summary of contents
Page 1
... Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1995 64KB Data Memory Addressing Y ...
Page 2
270431–1 Figure 1 Connection Diagrams 270431 – 2 270431 –3 ...
Page 3
On 80C152JB JD Only Figure 2 Block Diagram 8XC152JA 270431 –18 3 ...
Page 4
80C152JB JD General Description The 80C152JB ROMless extension of the 80C152 Universal Communication controller The 80C152JB has the same five 8-bit I O ports of the 80C152 plus an additional two 8-bit I ...
Page 5
Pin (1) DIP PLCC Supply voltage CC ( Circuit ground SS 18-21 27-30 Port 0 Port 8-bit open drain bidirectional I O port As an output port each pin 25-28 ...
Page 6
Pin 47-40 65-58 Port 4 Port 8-bit bidirectional I O port with internal pullups Port 4 pins that have 1s written to them are pulled high by the internal pullups and in that ...
Page 7
OSCILLATOR CHARACTERISTICS XTAL1 and XTAL2 are the input and output respec- tively of an inverting amplifier which can be config- ured for use as an on-chip oscillator as shown in Figure 3 To drive the device from an external clock ...
Page 8
ABSOLUTE MAXIMUM RATINGS Ambient Temperature Under Bias Storage Temperature Voltage on Any pin Voltage VSS Power ...
Page 9
MAX I (ACTIVE) cc MAX I cc EXPLANATION OF THE AC SYMBOLS Each timing symbol has 5 characters The first char- acter is always a ‘T’ (stands for time) The other characters depending on their positions stand for the name ...
Page 10
CHARACTERISTICS (T A Port 0 ALE and PSEN 100 pF Load Capacitance for All Other Outputs e EXTERNAL PROGRAM AND DATA MEMORY CHARACTERISTICS Symbol Parameter 1 TCLCL Oscillator Frequency 80C152JA JC 83C152JA JC 80C152JB ...
Page 11
EXTERNAL PROGRAM MEMORY READ CYCLE EXTERNAL DATA MEMORY READ CYCLE 8XC152JA 270431 – 8 270431 – ...
Page 12
EXTERNAL DATA MEMORY WRITE CYCLE EXTERNAL CLOCK DRIVE Symbol Parameter 1 TCLCL Oscillator Frequency TCHCX High Time TCLCX Low Time TCLCH Rise Time TCHCL Fall Time EXTERNAL CLOCK DRIVE WAVEFORM 12 270431 –10 Min Max Units ...
Page 13
LOCAL SERIAL CHANNEL TIMING SHIFT REGISTER MODE Symbol Parameter TXLXL Serial Port Clock Cycle Time TQVXH Output Data Setup to Clock Rising Edge TXHQX Output Data Hold After Clock Rising Edge TXHDX Input Data Hold After Clock Rising Edge TXHDV ...
Page 14
GLOBAL SERIAL PORT TIMINGS Internal Baud Rate Generator Symbol Parameter HBTJR Allowable jitter on the Receiver for bit time (Manchester encoding only) FBTJR Allowable jitter on the Receiver for one full bit time (NRZI and Manchester) ...
Page 15
GSC TRANSMIT TIMINGS (INTERNAL BAUD RATE GENERATOR) GLOBAL SERIAL PORT TIMINGS External Clock Symbol Parameter 1 ECBT GSC Frequency with an External Clock ECH External Clock High (13) ECL External Clock Low ECRT External Clock Rise (11) Time ECFT External ...
Page 16
GSC TIMINGS (EXTERNAL CLOCK) NOTES pins on PLCC package may be connected to internal die and should not be used in customer applications recommended that both Pin 3 and Pin ...
Page 17
DESIGN NOTES Within the 8XC152 there exists a race condition that may set both the RDN and AE bits at the end of a valid reception This will not cause a problem in the application as long as the following ...