AM186 Advanced Micro Devices, AM186 Datasheet
AM186
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AM186 Summary of contents
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... The Am186ER and Am188ER microcontrollers have ...
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... Am186™ER MICROCONTROLLER BLOCK DIAGRAM INT2/INTA0 INT3/INTA1/IRQ CLKOUTA INT4 CLKOUTB X2 X1 Clock and Interrupt Power Control Unit Management V CC Unit Watchdog GND Timer (WDT) Control Control Registers Registers RES Control Refresh Registers Control ARDY Unit SRDY S2 S1/IMDIS S0/SREN Bus DT/R Interface DEN ...
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... AO15–AO8 WB AD7–AD0 WR RFSH2/ADEN ALE Notes: * All PIO signals are shared with other physical pins. See the pin descriptions beginning on page 30 and Table 3 on page 36 for information on shared functions. TM Am186 INT1/SELECT TMROUT0 INT0 TMRIN0 NMI Timer Control Unit 0 1 (WDT) ...
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... SPEED OPTION – MHz – MHz – MHz – MHz DEVICE NUMBER/DESCRIPTION Am186ER = High-Performance, 80C186-Compatible, 16-Bit Embedded Microcontroller with RAM Am188ER = High-Performance, 80C188-Compatible, 16-Bit Embedded Microcontroller with RAM Valid combinations list configurations planned to be supported in volume for this device. Consult the ...
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... Comparison of the A 186™ER and 80C186 Microcontrollers ................................................. 15 TQFP Connection Diagram and Pinouts—A TQFP Pin Assignments—Am186™ER Microcontroller (Sorted by Pin Number) ...................... 17 TQFP Pin Assignments—Am186™ER Microcontroller (Sorted by Pin Name) .......................... 18 TQFP Connection Diagram and Pinouts—A TQFP Pin Assignments—Am188™ER Microcontroller (Sorted by Pin Number) ...................... 20 m TQFP Pin Assignments— ...
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... SRDY/PIO6 .................................................................................................................... 38 TMRIN0/PIO11 .............................................................................................................. 38 TMRIN1/PIO0 ................................................................................................................ 38 TMROUT0/PIO10 .......................................................................................................... 38 TMROUT1/PIO1 ............................................................................................................ 38 TXD/PIO27 ..................................................................................................................... 38 UCS/ONCE1 .................................................................................................................. 38 UZI/CLKSEL2/PIO26 ..................................................................................................... 38 V ................................................................................................................................ 39 CC WHB (Am186™ER Microcontroller Only) ...................................................................... 39 WLB (Am186™ER Microcontroller Only) ........................................................................ 39 WB (Am188™ER Microcontroller Only) ......................................................................... 39 WR ................................................................................................................................. 39 X1 ................................................................................................................................... 39 X2 ................................................................................................................................... 39 Functional Description ............................................................................................................... 40 Memory Organization ..................................................................................................... 40 I/O Space ....................................................................................................................... 40 Bus Operation ............................................................................................................................ 41 Bus Interface Unit ...................................................................................................................... 41 Nonmultiplexed Address Bus ......................................................................................... 41 Byte Write Enables ...
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... Write Cycle (25 MHz and 33 MHz) ................................................................................ 73 Switching Characteristics over Commercial and Industrial Operating Ranges, Write Cycle (40 MHz and 50 MHz) ................................................................................ 74 Write Cycle Waveforms ................................................................................................. 75 Switching Characteristics over Commercial and Industrial Operating Ranges, Internal RAM Show Read Cycle (25 MHz and 33 MHz) ................................................ 76 TM Am186 TM ER and Am188 ER Microcontrollers Data Sheet 7 ...
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... Reset Waveforms ........................................................................................................ 100 Signals Related to Reset Waveforms .......................................................................... 100 Bus Hold Waveforms—Entering .................................................................................. 101 Bus Hold Waveforms—Leaving ................................................................................... 101 Switching Characteristics over Commercial and Industrial Operating Ranges, Synchronous Serial Interface (SSI) (25 MHz and 33 MHz) ......................................... 102 TM 8 Am186 TM ER and Am188 ER Microcontrollers Data Sheet ...
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... Bus Cycle Encoding ............................................................................................... 37 Table 6. Clocking Modes ..................................................................................................... 39 Table 7. Segment Register Selection Rules ........................................................................ 40 Table 8. Maximum and Minimum Clock Frequencies .......................................................... 44 Table 9. Am186ER Microcontroller Maximum DMA Transfer Rates .................................. 55 Table 10. Thermal Characteristics ( C/Watt) ......................................................................... 61 Table 11. Typical Power Consumption Calculation ............................................................... 62 Table 12. Junction Temperature Calculation ......................................................................... 62 Table 13. Typical Ambient Temperatures for PQFP with Two-Layer Board .......................... 63 Table 14 ...
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... May 2000 D feature, "a PSRAM controller" was added. Under “HOLD” on page 32, the sentence, "A HOLD request is second only to DRAM or PSRAM May 2000 D refresh requests in priority of activity requests received by the processor." is changed Am186 TM ER and Am188 ER Microcontrollers Data Sheet ...
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... In “Read Cycle Waveforms” on page 72, the UZI line in the diagram was changed. May 2000 D In “Write Cycle Waveforms” on page 75, the UZI line in the diagram was changed. May 2000 D Added the diagram, Table 11, “ARDY and SRDY Synchronization Logic Diagram,” on page 49. May 2000 D Added an index. TM Am186 ER and Am188 TM ER Microcontrollers Data Sheet 11 ...
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... TM 12 Am186 AMD-K6™-2E Microprocessor Am5 86® ÉlanSC520 x Microcontroller ÉlanSC400 Microcontroller ÉlanSC410 Microcontroller Am186CC Communications Controller Am186ES and Am188ES Microcontrollers Am186ESLV & Am188ESLV Microcontrollers TM ER and Am188 ER Microcontrollers Data Sheet Am186ED Microcontroller Am186ER and Am188ER Microcontrollers Am186EDLV Microcontroller — Microprocessors — 16- and 32-bit microcontrollers ...
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... Am186ER and Am188ER Microcontrollers User’s Manual , order #21684 n FusionE86 SM Catalog , order #19255 n Making the Most of the Am186™ER or Am188™ER Microcontroller Application Note , order #21046 n Using the 3.3-V Am186™ER or Am188™ER Micro- controller in a 5-V System Application Note, order #21045 n Comparing the Am186™EM and Am186ER Micro- controllers Technical Bulletin (Available only at www ...
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... Both multiplexed and nonmultiplexed address buses are available on the Am186ER and Am188ER microcontrollers. The nonmultiplexed address bus eliminates system-support logic ordinarily needed to interface with external memory devices, while the mul- ...
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... Am186ER microcontroller. Figure 2 shows a compara- ble system implementation with an 80C186 microcon- troller. Because of its superior integration, the Am186ER system does not require the support devices required on the 80C186 example system. In addition, the Am186ER microcontroller provides significantly better performance with its 50-MHz clock rate. ...
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... TQFP CONNECTION DIAGRAM AND PINOUTS—Am186™ER MICROCONTROLLER Top Side View—100-Pin Thin Quad Flat Pack (TQFP) AD0 1 AD8 2 AD1 3 AD9 4 AD2 5 AD10 6 AD3 7 AD11 8 AD4 9 AD12 10 AD5 11 GND 12 AD13 13 AD6 AD14 16 AD7 17 AD15 18 19 S6/CLKSEL1 20 UZI/CLKSEL2 TXD 21 RXD ...
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... TQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Number) Pin No. Name Pin No. Name 1 AD0 2 AD8 3 AD1 4 AD9 5 AD2 6 AD10 7 AD3 8 AD11 9 AD4 10 AD12 11 AD5 12 GND 13 AD13 14 AD6 AD14 17 AD7 18 AD15 19 S6/CKLSEL1/PIO29 20 UZI/CLKSEL2/PIO26 21 TXD 22 RXD 23 SDATA/PIO21 24 SDEN1/PIO23 25 SDEN0/PIO22 TM Am186 Pin No. Name ...
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... TQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Name) Pin Name No. Pin Name A0 63 AD5 A1 62 AD6 A2 60 AD7 A3 59 AD8 A4 58 AD9 A5 57 AD10 A6 56 AD11 A7 55 AD12 A8 54 AD13 A9 53 AD14 A10 52 AD15 A11 51 ALE A12 50 ARDY A13 49 BHE/ADEN ...
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... AD6 AO14 16 AD7 17 AO15 18 19 S6/CLKSEL1 20 UZI/CLKSEL2 TXD 21 RXD 22 SDATA 23 SDEN1 24 SDEN0 25 Notes: Pin 1 is marked for orientation. TM Am186 Am188ER Microcontroller TM ER and Am188 ER Microcontrollers Data Sheet 75 INT4 74 MCS1 73 MCS0 72 DEN 71 DT/R 70 NMI 69 SRDY 68 HOLD 67 HLDA GND 64 GND ...
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... AO11 9 AD4 10 AO12 11 AD5 12 GND 13 AO13 14 AD6 AO14 17 AD7 18 AO15 19 S6/CLKSEL1/PIO29 20 UZI/CLKSEL2/PIO26 21 TXD/PIO27 22 RXD/PIO28 23 SDATA/PIO21 24 SDEN1/PIO23 25 SDEN0/PIO22 TM 20 Am186 Pin No. Name 26 SCLK/PIO20 51 A11 27 RFSH2/ADEN 52 A10 ALE ARDY S1/IMDIS S0/SREN 59 A3 ...
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... A14 48 CLKOUTB A15 47 DEN/PIO5 A16 46 DRQ0/PIO12 A17/PIO7 45 DRQ1/PIO13 A18/PIO8 43 DT/R/PIO4 A19/PIO9 42 GND AD0 1 GND AD1 3 GND AD2 5 GND AD3 7 GND AD4 9 GND TM Am186 No. Pin Name 11 GND 14 HLDA 17 HOLD 30 INT0 2 INT1/SELECT 4 INT2/INTA0/PIO31 6 INT3/INTA1/IRQ 8 INT4/PIO30 10 LCS/ONCE0 13 MCS0/PIO14 16 MCS1/PIO15 18 MCS2/PIO24 31 MCS3/RFSH/PIO25 39 NMI 40 PCS0/PIO16 72 PCS1/PIO17 ...
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... PQFP CONNECTION DIAGRAM AND PINOUTS—Am186™ER MICROCONTROLLER Top Side View—100-Pin Plastic Quad Flat Pack (PQFP) 1 SDEN1 2 SDEN0 3 SCLK 4 BHE/ADEN ALE 8 ARDY S1/IMDIS 11 S0/SREN 12 GND CLKOUTA 16 17 CLKOUTB 18 GND 19 A19 20 A18 A17 ...
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... PQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Number) Pin No. Name Pin No. Name 1 SDEN1/PIO23 26 2 SDEN0/PIO22 27 3 SCLK/PIO20 28 4 BHE/ADEN ALE 32 8 ARDY S1/IMDIS 35 11 S0/SREN 36 12 GND CLKOUTA ...
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... PQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Name) Pin Name No. Pin Name A0 40 AD5 A1 39 AD6 A2 37 AD7 A3 36 AD8 A4 35 AD9 A5 34 AD10 A6 33 AD11 A7 32 AD12 A8 31 AD13 A9 30 AD14 A10 29 AD15 A11 28 ALE A12 27 ARDY A13 26 BHE/ADEN ...
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... GND 19 A19 20 A18 A17 23 A16 24 A15 25 A14 26 A13 27 A12 28 A11 29 A10 30 A9 Notes: Pin 1 is marked for orientation. TM Am186 Am188ER Microcontroller TM ER and Am188 ER Microcontrollers Data Sheet 80 AD1 79 AD8 78 AD0 77 DRQ0 76 DRQ1 75 TMRIN0 74 TMROUT0 73 TMROUT1 72 TMRIN1 71 RES 70 GND 69 MCS3/RFSH ...
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... CLKOUTB 42 18 GND 43 19 A19/PIO9 44 20 A18/PIO8 A17/PIO7 47 23 A16 48 24 A15 49 25 A14 Am186 Pin No. Name A13 51 MCS1/PIO15 A12 52 INT4/PIO30 A11 53 INT3/INTA1/IRQ A10 54 INT2/INTA0/PIO31 A9 55 INT1/SELECT A8 56 INT0 A7 57 UCS/ONCE1 A6 58 LCS/ONCE0 A5 59 PCS6/A2/PIO2 A4 60 ...
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... A14 25 CLKOUTB A15 24 DEN/PIO5 A16 23 DRQ0/PIO12 A17/PIO7 22 DRQ1/PIO13 A18/PIO8 20 DT/R/PIO4 A19/PIO9 19 GND AD0 78 GND AD1 80 GND AD2 82 GND AD3 84 GND AD4 86 GND TM Am186 No. Pin Name 88 GND 91 HLDA 94 HOLD 7 INT0 79 INT1/SELECT 81 INT2/INTA0/PIO31 83 INT3/INTA1/IRQ 85 INT4/PIO30 87 LCS/ONCE0 90 MCS0/PIO14 93 MCS1/PIO15 95 MCS2/PIO24 8 MCS3/RFSH/PIO25 16 NMI 17 PCS0/PIO16 49 PCS1/PIO17 ...
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... LOGIC SYMBOL—Am186™ER MICROCONTROLLER Clocks 20 * Address and 16 Address/Data Buses * * Bus Control * * * * * Timer Control * * 32 shared Programmable ** I/O Control Notes: * These signals are the normal function of a pin that can be used as a PIO. See the pin descriptions beginning on page 30 and Table 3 on page 36 for information on shared function. ...
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... Notes: * These signals are the normal function of a pin that can be used as a PIO. See the pin descriptions beginning on page 30 and Table 3 on page 36 for information on shared function. ** All PIO signals are shared with other physical pins. TM Am186 X1 X2 CLKOUTA INT3/INTA1/IRQ ...
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... S0/SREN, S6/CLKSEL1, and UZI/CLKSEL2. Emulators require that S6/CLKSEL1 and UZI/ CLKSEL2 be configured in their normal functionality, that is and UZI. If BHE/ADEN (on the Am186ER microcontroller) or RFSH2/ADEN (on the Am188ER microcontroller) is held Low during the rising edge of RES, S6 and UZI are configured in their normal func- tionality and cannot be programmed as PIOs. A19– ...
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... BHE does not need to be latched BHE is three-stated during bus hold and reset condi- tions. On the Am186ER microcontroller, WLB and WHB im- plement the functionality of BHE and AD0 for high and low byte write enables. Table 2. Data Byte Encoding BHE AD0 Type of Bus Cycle ...
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... DMA transfer begins, the HOLD latency can be as great as four bus cycles. This occurs if a DMA word transfer operation is taking place (Am186ER microcontroller only) from an odd address to an odd address. This is a total of 16 clock cycles or more if wait states are required. In addition, if locked transfers are performed, the HOLD latency time is in- creased by the length of the locked transfer ...
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... TM Am186 INT4/PIO30 Maskable Interrupt Request 4 (input, asynchronous) This pin indicates to the microcontroller that an inter- rupt request has occurred. If the INT4 pin is not ...
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... PCS3–PCS0 are held High during a bus hold condition. They are also held High during reset. PCS4 is not available on the Am186ER and Am188ER microcontrollers. Unlike the UCS/LCS chip selects, the PCS outputs as- sert with the multiplexed AD address bus. Note also ...
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... I/O pins. Each PIO can be programmed with the following attributes: PIO func- tion (enabled/disabled), direction (input/output), and weak pullup or pulldown. On the Am186ER and Am188ER microcontrollers, the internal pullup resistor has a value of approximately 100 kohms. The internal pulldown resistor has a value of approximately 100 kohms. ...
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... S2–S0, RES, NMI, CLKOUTA, BHE, ALE, AD15–AD0, and A16–A0.) 2. These pins revert to normal operation if BHE/ADEN (Am186ER microcontroller) or RFSH2/ADEN (Am188ER microcontroller) is held Low during power-on reset. 3. When used as a PIO, input with pullup option available. 4. When used as a PIO, input with pulldown option available. ...
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... DMA-initiated bus cycle. During a bus hold or reset condition three-stated. TM Am186 CLKSEL1—The clocking mode of the Am186ER and Am188ER microcontrollers is controlled by UZI/ CLKSEL2/PIO26 and S6/CLKSEL1/PIO29. Both CLKSEL2 and CLKSEL1 are held High during power- on reset because of an internal pullup resistor. This is the default clocking mode— ...
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... UZI/CLKSEL2 is three-stated during bus holds and ONCE mode. CLKSEL2—The clocking mode of the Am186ER and Am188ER microcontrollers is controlled by UZI/ CLKSEL2/PIO26 and S6/CLKSEL1/PIO29 during re- set. Both CLKSEL2 and CLKSEL1 are held High during power-on reset because of an internal pullup resistor. This is the default clocking mode— ...
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... This pin and the X1 pin provide connections for a fun- damental mode crystal used by the internal oscillator circuit. If providing an external clock source, connect the source to X1 and leave X2 unconnected. Unlike the rest of the pins on the Am186ER and Am188ER micro- controllers not 5-V tolerant and Am188 ER Microcontrollers Data Sheet ...
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... The Am186ER and Am188ER microcontrollers are backward compatible with the 80C186/80C188 and Am186/Am188 micro- controllers. A full description of the Am186ER and Am188ER mi- crocontrollers’ registers and instructions is included in the Am186ER and Am188ER Microcontrollers User’s Manual , order #21684. ...
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... Figure 4 on page 42 shows the affected signals during a normal read or write operation for an Am186ER mi- crocontroller. The address and data will be multiplexed onto the AD bus. Figure 5 on page 42 shows an Am186ER microcontrol- ler bus cycle when address bus disable is in effect ...
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... LCS or UCS MCSx, PCSx Figure 4. Am186™ER Microcontroller Address Bus—Normal Operation CLKOUTA A19–A0 AD7–AD0 (Read) AD15–AD8 (Read) AD15–AD0 (Write) LCS or UCS Figure 5. Am186™ER Microcontroller—Address Bus Disable in Effect TM 42 Am186 Address Phase Address Address ...
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... Figure 6. Am188™ER Microcontroller Address Bus—Normal Operation t Address Phase CLKOUTA A19–A0 AD7–AD0 (Read) AO15–AO8 AD7–AD0 (Write) LCS or UCS Figure 7. Am188™ER Microcontroller—Address Bus Disable in Effect TM TM Am186 ER and Am188 Data Phase Address Data Address Data ...
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... Phase-Locked Loop (PLL traditional 80C186/80C188 design, the internal clock frequency is half the frequency of the crystal. Because of the internal PLL on the Am186ER and Am188ER micro- controllers, the internal clock generated by both micro- controllers can operate four times the frequency of the crystal. The Am186ER and Am188ER microcon- trollers operate in the following modes: n Divide by Two— ...
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... Crystal-Driven Clock Source The internal oscillator circuit of the Am186ER and Am188ER microcontrollers is designed to function with a parallel-resonant fundamental mode crystal. Be- cause of the PLL, the crystal frequency can be twice, equal to, or one quarter of the processor frequency. Do not replace a crystal with equivalent. See Figure 8 for a diagram of oscillator configurations ...
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... Serial Port Control Register TM ER and Am188 ER Microcontrollers Data Sheet Note: Gaps in offset addresses indicate reserved registers. No access should be made to reserved registers. Changed from original Am186 microcontroller w * Changed from Am186EM and Am188EM microcontrollers ** New to the Am186ER and Am188ER microcontrollers ...
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... Synchronous Serial Transmit 1 Register 14 Synchronous Serial Enable Register 12 Synchronous Serial Status Register 10 Figure 9. Peripheral Control Block Register Map (Continued) TM Am186 ER and Am188 Notes: Gaps in offset addresses indicate reserved registers. No access should be made to reserved registers. Changed from original Am186 microcontroller TM ER Microcontrollers Data Sheet 47 ...
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... CLKSEL1 Notes: 1. Set via PDCON Register System Clocks The base system clock of the original Am186/Am188 microcontrollers is renamed CLKOUTA and the addi- tional output is called CLKOUTB. CLKOUTA and CLK- OUTB operate at either the fundamental processor frequency or the CPU clock (power-save) frequency. Figure 10 shows the organization of the clocks. ...
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... Ready and Wait-State Programming The Am186ER and Am188ER microcontrollers can be programmed to sense a ready signal for each of the ex- ternal peripheral or memory chip-select lines. The ex- ternal ready signal can be either the ARDY or SRDY signal as shown in Figure 11 ...
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... Memory Maps There are several possible ways to configure the ad- dress space of the Am186ER and Am188ER microcon- 1 Mbyte External Flash External Flash (UCS) 512 Kbytes External RAM 32 Kbytes Internal RAM Internal RAM 0 Kbyte 512 Kbytes Flash 256 Kbytes Flash No External RAM Internal RAM at 0 ...
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... LCS pin has tradition- ally been used to control data memory. The LCS pin is not active on reset. The Am186ER and Am188ER mi- crocontrollers also allow the IMCS Register and inter- nal memory to be programmed to address 0. This would allow the internal memory to be used for the in- terrupt vector table and data memory ...
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... The Am186ER and Am188ER microcontrollers provide six chip selects, PCS6–PCS5 and PCS3–PCS0, for use within a user-locatable memory or I/O block. PCS4 is not available on the Am186ER and Am188ER micro- controllers. The base address of the memory block can be located anywhere within the 1-Mbyte memory ad- ...
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... HOLD latency can be as great as four bus cycles. This occurs if a DMA word transfer operation is taking place from an odd address to an odd address (Am186ER microcontroller only). This is a total more clock cycles if wait states are required. In addition, if locked transfers are performed, the HOLD latency time is increased by the length of the locked transfer ...
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... DIRECT MEMORY ACCESS Direct memory access (DMA) permits transfer of data between memory and peripherals without CPU involve- ment. The DMA unit in the Am186ER and Am188ER microcontrollers, shown in Figure 13, provides two high-speed DMA channels. Data transfers can occur between memory and I/O spaces (e.g., memory to I/O) or within the same space (e ...
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... Each DMA control register determines the mode of op- eration for the particular DMA channel. This register specifies the following: n Mode of synchronization n Whether bytes or words are transferred (Am186ER microcontroller only) n Whether an interrupt is generated after the last transfer n Whether DMA activity ceases after a programmed ...
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... This four-pin interface permits half-duplex, bidirectional data transfer at speeds Mbit/s. Unlike the asynchronous serial port, the SSI operates in a master/slave configuration. The Am186ER and Am188ER microcontrollers are the master ports. The SSI interface provides four pins for communicating with system components: two enables (SDEN0 and SDEN1), a clock (SCLK), and a data pin (SDATA) ...
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... PROGRAMMABLE I/O (PIO) PINS There are 32 pins on the Am186ER and Am188ER mi- crocontrollers that are available as multipurpose sig- nals. Table 3 and Table 4 on page 36 list the PIO pins. Each of these pins can be used as a user-programma- ble input or output signal if the normal shared function is not needed ...
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... Figure 14. Synchronous Serial Interface Multiple Write PB=0 PB=1 PB=0 DR/DT=1 DR/DT=0 DR/DT=0 SDEN1 or SDEN0 SCLK SDATA Poll SSS for PB=0 Write to SSD Write to SSC, bit DE=1 Figure 15. Synchronous Serial Interface Multiple Read TM 58 Am186 PB=1 PB=0 DR/DT=0 DR/DT=1 Poll SSS for PB=0 Write to SSD PB=1 PB=0 DR/DT=0 DR/DT=1 Poll SSS for PB=0 Read from SSR Read from (dummy) SSR TM ...
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... The choice of a mixed voltage system design also involves balancing design complexity with the need for the additional features. Input/Output Circuitry To accommodate current 5-V systems, the Am186ER and Am188ER microcontrollers have 5-V tolerant I/O drivers. The drivers produce TTL-compatible drive out- put (minimum 2.4-V logic High) and receive TTL and CMOS levels ( ...
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... MHz ............................. 3 2.6 V Where Notes: Operating Ranges define those limits between which the functionality of the device is guaranteed. * Industrial versions of Am186ER and Am188ER microcon- trollers are available in 25- and 33-MHz operating frequen- cies only. Notes –1 Note 8 Note 1 ...
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... THERMAL CHARACTERISTICS TQFP Package The Am186ER and Am188ER microcontrollers are specified for operation with case temperature ranges from +100 C for a commercial temperature device. Case temperature is measured at the top center of the package as shown in Figure 16. The various temperatures and thermal resistances can be determined using the equations in Figure 17 with information given in Table 10 ...
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... Typical Ambient Temperatures The typical ambient temperature specifications are based on the following assumptions and calculations: The commercial operating range of the Am186ER and Am188ER microcontrollers is a case temperature 100 degrees Centigrade measured at the top C center of the package. An increase in the ambient temperature causes a proportional increase in T The 50-MHz microcontroller is specified as 3 ...
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... Legend: 50 MHz 76 40 MHz 33 MHz 74 25 Mhz 0 fpm Figure 18. Typical Ambient Temperatures for PQFP with Two-Layer Board TM Am186 Linear Feet per Minute Airflow 0 fpm 200 fpm 74.81 78.8 80.2 83.3 83.56 86.2 87.0 89.1 200 fpm Airflow (Linear Feet Per Minute and Am188 ER Microcontrollers Data Sheet ...
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... Legend: 50 MHz 40 MHz 33 MHz 65 25 Mhz 0 fpm Figure 19. Typical Ambient Temperatures for TQFP with Two-Layer Board TM 64 Am186 Linear Feet per Minute Airflow 0 fpm 200 fpm 69.5 76.1 76.0 81.2 80.1 84.4 84.2 87.7 200 fpm Airflow (Linear Feet Per Minute and Am188 ER Microcontrollers Data Sheet ...
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... Legend: 50 MHz 88 40 MHz 33 MHz 87 25 Mhz 0 fpm Figure 20. Typical Ambient Temperatures for PQFP with Four-Layer to Six-Layer Board TM Am186 Linear Feet per Minute Airflow 0 fpm 200 fpm 88.0 89.4 90.6 91.6 92.3 93.1 93.8 94.5 200 fpm Airflow (Linear Feet Per Minute and Am188 ER Microcontrollers Data Sheet ...
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... Legend: 50 MHz 85 40 MHz 33 MHz 84 25 Mhz 0 fpm Figure 21. Typical Ambient Temperatures for TQFP with Four-Layer to Six-Layer Board TM 66 Am186 Linear Feet per Minute Airflow 0 fpm 200 fpm 84.1 85.5 87.44 88.5 89.64 90.5 91.84 92.5 200 fpm Airflow (Linear Feet Per Minute and Am188 ER Microcontrollers Data Sheet ...
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... Key to Switching Waveforms WAVEFORM TM Am186 states. When no bus cycle is pending, an idle (t occurs multiplexed address is referred to as the AD address . Wait states, 4 bus ...
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... LCS Active Delay CLCSL t 16 MCS/PCS Active Delay CLCSV t 30 Data Hold Time CLDOX t 7 Data Valid Delay CLDV Notes: The following parameters are not defined or used at this time: 41, 56, 60, 73, 74, and 76 Am186 Parameter Symbol t CLDX t CLEV t CLHAV t CLRF t CLRH t CLRL t CLSH t ...
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... X1 High Time CHCK Fall Time CKHL Rise Time CKLH 42 t CLKOUTA Period CLCL Notes: The following parameters are not defined or used at this time: 41, 56, 60, 73, 74, and 76. TM Am186 Parameter Number Symbol t 43 CLCH t 44 CHCL t 45 CH1CH2 t 46 CL2CL1 t ...
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... L a Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN, INTA1–INTA0, WR, WHB, and WLB signals either spec 2 or spec 59 is met with respect to data hold time, the part will function correctly Am186 25 MHz Min ...
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... L a Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN, INTA1–INTA0, WR, WHB, and WLB signals either specification 2 or specification 59 is met with respect to data hold time, the part will function correctly. TM Am186 Preliminary 40 MHz Min Max 5 ...
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... AD15–AD0*, AD7–AD0** AO15–AO8 ALE RD 5 BHE* 67 LCS, UCS 16 MCS1–MCS0, PCS6–PCS5, PCS3–PCS0 DEN 19 DT/R 22 S2–S0 3 UZI Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM 72 Am186 Address 14 7 Address Address BHE 13 ...
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... AVBL Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN, INTA1–INTA0, WR, WHB, and WLB signals. TM Am186 25 MHz Min – ...
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... Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN, INTA1–INTA0, WR, WHB, and WLB signals Am186 40 MHz Min – ...
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... AD7–AD0** AO15–AO8 ALE WR 20 WHB*, WLB WB 5 BHE* 67 LCS, UCS 16 MCS3–MCS0, PCS6–PCS5, PCS3–PCS0 DEN DT/R S2–S0 3 UZI Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM Am186 Address 14 7 Address Address BHE Status 7 ...
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... ALE Inactive Delay CHLL Read Cycle Timing Responses Active Delay CLRL Inactive Delay CLRH t 68 CLKOUTA High to A Address Valid CHAV TM 76 Am186 Preliminary 25 MHz Min Max MHz Min and Am188 ER Microcontrollers Data Sheet ...
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... Internal RAM Show Read Cycle Waveform CLKOUTA A19–A0 AD15–AD0 5 ALE RD LCS, UCS MCS3–MCS0, PCS6–PCS5, PCS3–PCS0 TM Am186 Address Address and Am188 ER Microcontrollers Data Sheet Data ...
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... C =50 pF. For switching tests Testing is performed with equal loading on referenced pins either spec 2 or spec 59 is met with respect to data hold time, the part will function correctly Am186 Preliminary 25 MHz Min Max ...
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... All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins either specification 2 or specification 59 is met with respect to data hold time, the part will function correctly. TM Am186 40 MHz Min ...
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... PSRAM Read Cycle Waveforms CLKOUTA A19– AD15–AD0*, AD7–AD0** AO15–AO8 ALE RD 27 LCS 80 84 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM 80 Am186 Address 7 Address Address and Am188 ER Microcontrollers Data Sheet ...
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... Low Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN, WR, WHB and WLB signals. TM Am186 Preliminary 25 MHz Min Max ...
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... Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN, WR, WHB and WLB signals Am186 Preliminary 40 MHz Min Max ...
Page 83
... CLKOUTA A19– AD15–AD0*, Data AD7–AD0** AO15–AO8 ALE WHB*, WLB* 87 WB** LCS 80 84 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM Am186 Address 7 Address Address and Am188 ER Microcontrollers Data Sheet ...
Page 84
... RFCY t 86 LCS Inactive to RFSH Active Delay LCRF Notes: All timing parameters are measured at V are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins Am186 Preliminary 25 MHz Min Max t –10=30 CLCL 0 2t –15=65 CLCL 0 (a) t – ...
Page 85
... RFSH Cycle Time RFCY t 86 LCS Inactive to RFSH Active Delay LCRF Notes: All timing parameters are measured at V are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. TM Am186 Preliminary 40 MHz Min Max t –5=20 CLCL 0 2t –10=40 CLCL 0 ...
Page 86
... PSRAM Refresh Cycle Waveforms CLKOUTA A19– ALE LCS RFSH 86 Note: * The period t is fixed at three wait states for PSRAM auto refresh only Am186 Address and Am188 ER Microcontrollers Data Sheet ...
Page 87
... All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the INTA1–INTA0 signals. c This parameter applies to the DEN and DT/R signals. TM Am186 Preliminary 25 MHz Min Max ...
Page 88
... All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the INTA1–INTA0 signals. c This parameter applies to the DEN and DT/R signals Am186 Preliminary 40 MHz Min Max ...
Page 89
... DEN 22 DT/R S2–S0 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only a The status bits become inactive in the state preceding t b The data hold time lasts only until the interrupt acknowledge signal deasserts, even if the interrupt acknowledge transition occurs prior to t (min). CLDX c This parameter applies to an interrupt acknowledge cycle that follows a write cycle ...
Page 90
... CHAV Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests Testing is performed with equal loading on referenced pins. b This parameter applies to the DEN signal Am186 Preliminary 25 MHz Min Max –10=30 CLCL ...
Page 91
... Software Halt Cycle Waveforms CLKOUTA 68 A19–A0 5 S6, AD15–AD0*, AD7–AD0**, AO15-AO8** ALE 9 DEN 19 DT/R S2–S0 3 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM Am186 Invalid Address Status TM ER and Am188 ER Microcontrollers Data Sheet Invalid Address ...
Page 92
... L a The specifications for CLKIN are applicable to the Divide by Two and Times One modes. The Times One mode should be used for operations from 16 MHz to 20 MHz. The Times Four mode should be used for operations above 20 MHz Am186 Preliminary Min 40 (a) 15 ...
Page 93
... All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests The Times One mode should be used for operations from 16 MHz to 20 MHz. The Times Four mode should be used for operations above 20 MHz. TM Am186 Preliminary 33 MHz Min 120 (a) 55 ...
Page 94
... All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests The Times One mode should be used for operations from 16 MHz to 20 MHz. The Times Four mode should be used for operations above 20 MHz Am186 40 MHz Min 100 (a) 45 (a) 45 ...
Page 95
... CLKOUTA (Divide by four) CLKOUTB * CLKOUTB ** Notes: * The CLKOUTB Output Frequency (CBF) bit in the Power Save Control Register (PDCON) is set The CLKOUTB Output Frequency (CBF) bit in the Power Save Control Register (PDCON) is cleared Am186 and Am188 ...
Page 96
... CLTMV Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests This timing must be met to guarantee proper operation. b This timing must be met to guarantee recognition at the clock edge Am186 25 MHz Min (a) 10 (a) 3 (b) 10 (a) ...
Page 97
... Ready System) Notes: 1. Normally not-ready system. 2. Normally ready system. Asynchronous Ready Waveforms Case 1 Case 2 Case 3 Case 4 Case 5 CLKOUTA ARDY (Normally Not-Ready System) ARDY (Normally Ready System) Notes: 1. Normally not-ready system. 2. Normally ready system. TM Am186 ...
Page 98
... Peripheral Waveforms CLKOUTA INT4–INT0, NMI, TMRIN1–TMRIN0 DRQ1–DRQ0 TMROUT1– TMROUT0 TM 98 Am186 and Am188 ER Microcontrollers Data Sheet 55 ...
Page 99
... CHCV Notes: All timing parameters are measured at V output test conditions are with C =50 pF. For switching tests This timing must be met to guarantee recognition at the next clock. TM Am186 25 MHz Min with 50 pF loading on CLKOUTA, unless otherwise noted. All CC =0 ...
Page 100
... In Divide by Two mode and Times One mode, S6/CLKSEL1 and UZI/CLKSEL2 must be held for 3 clock cycles after reset negates. ***In Times Four mode, S6/CLKSEL1 and UZI/CLKSEL2 must be held for 5 clock cycles after reset negates. TM 100 Am186 57 Three-State TM ER and Am188 ER Microcontrollers Data Sheet ...
Page 101
... HOLD HLDA AD15–AD0, DEN A19–A0, S6, RD, WR, BHE, DT/R, S2-S0 WHB, WLB Bus Hold Waveforms—Leaving Case 1 Case 2 CLKOUTA HOLD HLDA AD15–AD0, DEN A19–A0, S6, RD, WR, BHE, DT/R, S2–S0 WHB, WLB TM Am186 Case Case ...
Page 102
... SCLK Low to Data Valid SLDV Note: All timing parameters are measured at V are with C =50 pF. For switching tests 102 Am186 25 MHz Min with 50 pF loading on CLKOUTA, unless otherwise noted. All output test conditions CC =0.3 V and V =V –0 ...
Page 103
... Synchronous Serial Interface (SSI) Waveforms CLKOUTA SDEN1 or SDEN0 SCLK SDATA (RX) SDATA (TX) Note: SDATA is bidirectional and used for either transmit (TX) or receive (RX). Timing is shown separately for each case. TM Am186 and Am188 ER Microcontrollers Data Sheet 72 DATA 77 75 DATA 103 ...
Page 104
... TQFP PHYSICAL DIMENSIONS PQL 100, Trimmed and Formed Thin Quad Flat Pack 100 1 1.35 1.45 0.17 0.27 1.00 REF. Notes: 1. All measurements are in millimeters, unless otherwise noted. 2. Not to scale; for reference only. TM 104 Am186 13.80 14.20 15.80 16.20 11 – – 13 0.50 BSC TM ER and Am188 ER Microcontrollers Data Sheet 15.80 16.20 13.80 14.20 1.60 MAX 16-038-PQT-2_AI PQL100 9 ...
Page 105
... PQFP PHYSICAL DIMENSIONS PQR 100, Trimmed and Formed Plastic Quad Flat Pack Pin 100 12.35 REF Pin 1 I.D. Pin 30 2.70 2.90 0.25 MIN Notes: 1. All measurements are in millimeters, unless otherwise noted. 2. Not to scale; for reference only. TM Am186 17.00 17.40 13.90 14.10 Pin 50 0.65 BASIC TM ER and Am188 ER Microcontrollers Data Sheet Pin 80 18.85 REF 19.90 20.10 23.00 23 ...
Page 106
... TM 106 Am186 TM ER and Am188 ER Microcontrollers Data Sheet ...
Page 107
... Am186ER and 80C186 microcontrollers, 15 crystal selecting, 45 crystal-driven clock source, 45 customer support, 13 documentation and literature, 13 hotline and web, 13 literature ordering, 13 third-party development support products, 13 ...
Page 108
... RAM, 14 memory integration, 1 software-compatible, 1 x86 software compatibility, 14 four-pin interface, 57 functional description GND, 32 Index-2 Am186™CC Communications Controller Data Sheet H HLDA, 32 HOLD, 32 hotline and world wide web support I/O circuitry, 59 I/O space, 40 industrial operating ranges, 60 initialization and processor reset, 48 ...
Page 109
... RFSH2/ADEN, 35 RXD/PIO28, 35 S0/SREN, 37 S1/IMDIS, 37 S2, 35 S6/CLKSEL1/PIO29, 37 SCLK/PIO20, 37 SDATA/PIO21, 37 SDEN0/PIO22, 37 SDEN1/PIO23, 37 SRDY/PIO6, 38 TMRIN0/PIO11, 38 TMRIN1/PIO0, 38 TMROUT0/PIO10, 38 TMROUT1/PIO1, 38 TXD/PIO27, 38 UCS/ONCE1, 38 used by emulators, 30 UZI/CLKSEL2/PIO26, 38 VCC (Am188ER microcontroller only), 39 WHB, 39 WLB (Am186ER microcontroller only), 39 WR, 39 X1, 39 X2, 39 PIO31–PIO0, 35 plastic quad flat pack, 105 Index-3 ...
Page 110
... RES, 35 reset initialization and processor, 48 reset and bus hold (25 and 33 MHz), 99 reset and bus hold (40 and 50 MHz), 99 Index-4 Am186™CC Communications Controller Data Sheet reset configuration register, 48 reset waveforms, 100 related signals, 100 revision history, 10 RFSH2/ADEN, 35 RXD/PIO28 ...
Page 111
... SSI, 103 synchronous ready, 97 synchronous serial interface, 103 write cycle (Am188ER microcontroller only), 39 WHB, 39 WLB (Am186ER microcontroller only), 39 world wide web support, 13 WR, 39 write cycle waveforms, 75 www home page, 13 support X1, 39 ...
Page 112
... Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Am386, Am5 86, and Am486 are registered trademarks, and Am186, Am188, E86, Élan, and AMD-K6 are trademarks of Advanced Micro x Devices, Inc. ...