MCM63Z818TQ133 Freescale Semiconductor, Inc, MCM63Z818TQ133 Datasheet

MCM63Z818TQ133

Manufacturer Part Number

MCM63Z818TQ133

Description

Manufacturer

Freescale Semiconductor, Inc

Datasheet

1.MCM63Z818TQ133.pdf (20 pages)

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Advance Information

128K x 36 and 256K x 18 Bit

Pipelined ZBT

Synchronous Fast Static RAM

zero bus turnaround. The ZBT RAM allows 100% use of bus cycles during

back–to–back read/write and write/read cycles. The MCM63Z736 is organized

as 128K words of 36 bits each and the MCM63Z818 is organized as 256K words

of 18 bits each, fabricated with high performance silicon gate CMOS

technology. This device integrates input registers, an output register, a 2–bit

address counter, and high speed SRAM onto a single monolithic circuit for

reduced parts count in communication applications. Synchronous design

allows precise cycle control with the use of an external clock (CK). CMOS

circuitry reduces the overall power consumption of the integrated functions for

greater reliability.

(G) and linear burst order (LBO) are clock (CK) controlled through positive–

edge–triggered noninverting registers.

clock (CK) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

triggered output register and then released to the output buffers at the next rising

edge of clock (CK).

ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc., and the architecture is supported by

Micron Technology, Inc. and Motorola, Inc.

This document contains information on a new product. Specifications and information herein are subject to change without notice.

REV 1

2/6/98

MOTOROLA FAST SRAM

Motorola, Inc. 1998

The ZBT RAM is a 4M–bit synchronous fast static RAM designed to provide

Addresses (SA), data inputs (DQ), and all control signals except output enable

Write cycles are internally self–timed and are initiated by the rising edge of the

For read cycles, pipelined SRAM output data is temporarily stored by an edge–

3.3 V LVTTL and LVCMOS Compatible

MCM63Z736/MCM63Z818–133 = 4.2 ns Access/7.5 ns Cycle (133 MHz)

MCM63Z736/MCM63Z818–100 = 5 ns Access/10 ns Cycle (100 MHz)

Selectable Burst Sequencing Order (Linear/Interleaved)

Internally Self–Timed Write Cycle

Two–Cycle Deselect

Byte Write Control

ADV Controlled Burst

100–Pin TQFP Package

RAM

MCM63Z736

MCM63Z818

MCM63Z736

Order this document

CASE 983A–01

TQ PACKAGE

by MCM63Z736/D

MCM63Z818

TQFP

Related parts for MCM63Z818TQ133

MCM63Z818TQ133 Summary of contents

Page 1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 128K x 36 and 256K x 18 Bit Pipelined ZBT RAM Synchronous Fast Static RAM The ZBT RAM is a 4M–bit synchronous fast static RAM designed to provide zero bus turnaround. The ZBT RAM ...

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DQc DQc DQc V DDQ V SS DQc DQc DQc DQc DDQ DQc DQc DQd DQd V DDQ V SS DQd DQd DQd DQd DDQ DQd ...

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DDQ DQb DQb DDQ DQb DQb DQb DQb V DDQ V SS DQb DQb DQb DDQ NC ...

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MCM63Z736 PIN DESCRIPTIONS Pin Locations (a) 51, 52, 53, 56, 57, 58, 59, 62, 63 (b) 68, 69, 72, 73, 74, 75, 78, 79 12, 13 (d) 18, ...

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MCM63Z818 PIN DESCRIPTIONS Pin Locations (a) 58, 59, 62, 63, 68, 69, 72, 73 12, 13, 18, 19, 22, 23 32, 33, 34, 35, 44, 45, 46, 47, 48, 49, ...

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TRUTH TABLE CK CKE E SW SBx L– L–H 0 False X L–H 0 True 0 L–H 0 True 1 L– (W) X (R, D) NOTES don‘t care ...

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INPUT COMMAND CODE AND STATE NAME DEFINITION DIAGRAM INPUT COMMAND D B CODE DESELECT CK CKE E FALSE SA0 – SAx ADV SW SBX NOTE: Cycles are named for their control inputs, not for data I/O state. MOTOROLA FAST SRAM ...

Page 8

B BURST KEY: CURRENT STATE (n) STATE ( TRANSITION INPUT COMMAND CODE STATE CK COMMAND CODE DQ Figure 2. State Definitions for ZBT RAM State Diagram D MCM63Z736 MCM63Z818 8 READ W B NEW ...

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R B DATA OUT INTERMEDIATE (Q VALID) KEY: INTERMEDIATE STATE ( CURRENT STATE (n) TRANSITION TRANSITION INPUT COMMAND CODE STATE CK COMMAND CODE DQ STATE NAME Figure 4. State Definitions for I/O State Diagrams MOTOROLA FAST SRAM INTERMEDIATE ...

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ABSOLUTE MAXIMUM RATINGS (See Note 1) Rating Symbol Power Supply Voltage V DD I/O Supply Voltage V DDQ Input Voltage Relative for out Any Pin Except V DD Input Voltage (Three State I/O) ...

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DC OPERATING CONDITIONS AND CHARACTERISTICS ( 3.3 V RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage I/O Supply Voltage Input Low Voltage Input High Voltage Input High Voltage I/O Pins * V DD and V DDQ are shorted together on ...

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AC OPERATING CONDITIONS AND CHARACTERISTICS ( 3.3 V Input Timing Measurement Reference Level . . . . . . . . . . . . . . . Input Pulse Levels . . . . . . . ...

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CK t AVKH SA0 – SAx t WVKH SW t WVKH SBx t EVKH E t LVKH ADV t CVKH CKE Figure 7. AC Timing Parameter Definitions MOTOROLA FAST SRAM t KHKH t KHKL t KLKH ...

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D MCM63Z736 MCM63Z818 14 MOTOROLA FAST SRAM ...

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MOTOROLA FAST SRAM D MCM63Z736 MCM63Z818 15 ...

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D MCM63Z736 MCM63Z818 16 MOTOROLA FAST SRAM ...

Page 17

MOTOROLA FAST SRAM D MCM63Z736 MCM63Z818 17 ...

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... Full Part Numbers — MCM63Z736TQ133 D MCM63Z736 MCM63Z818 18 ORDERING INFORMATION (Order by Full Part Number) 63Z736 MCM 63Z818 Blank = Trays Tape and Reel Speed (133 = 133 MHz, 100 = 100 MHz) Package (TQ = TQFP) MCM63Z736TQ100 MCM63Z736TQ133R MCM63Z736TQ100R MCM63Z818TQ133 MCM63Z818TQ100 MCM63Z818TQ133R MCM63Z818TQ100R MOTOROLA FAST SRAM ...

Page 19

H A– –A– 100 1 D1 TIPS 0.20 (0.008) C A–B A –H– –C– SEATING PLANE 0.05 (0.002 VIEW AB MOTOROLA FAST SRAM PACKAGE DIMENSIONS TQ ...

Page 20

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...

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