MPC9315 Integrated Device Technology, Inc., MPC9315 Datasheet

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... VCO frequency range. With available output dividers of divide-by-1, divide-by-2 and divide-by-4, the internal VCO of the MPC9315 is running at either 1x the reference clock frequency. The frequency of the QA, QB, QC output groups is either the equal, one half or one fourth of the selected VCO frequency and can be configured for each output bank using the FSELA, FSELB and FSELC pins, respectively ...

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... IDT™ 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc CCA CLK PLL Ref 1 CLK÷ – 160 MHz CLK÷ GND Figure 1. MPC9315 Logic Diagram MPC9315 ...

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... QB0 - QB3 = VCO clock frequency ÷ 2 QC0, QC1 = VCO clock frequency ÷ 4 180° (QA0, QA1 inverted) = 3.3 or 2.5 V, PLL enabled CCA Reset (VCO clamped to min. range) Outputs disabled (tristate), open PLL loop Max Unit Condition ±20 mA ±50 mA °C 125 MPC9315 MPC9315 3 ...

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... CCA I Maximum Quiescent Supply Current CCQ 1. The MPC9315 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission line to a termination voltage Inputs have pull-up or pull-down resistors affecting the input current. MPC9315 IDT™ 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver ...

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... I Maximum Quiescent Supply Current CCQ 1. The MPC9315 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated transmission line to a termination voltage Inputs have pull-up or pull-down resistors affecting the input current. IDT™ 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver ...

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... TBD MHz VCCA = GND (2) 160 MHz 160 MHz 80 MHz 40 MHz 75 % 1.0 ns 0.7 to 1.7 V +150 ps PLL locked 80 ps 120 1.0 ns 0. MHz MHz RMS value 15 ps RMS value (3) TBD ps RMS value 1.0 ms Advanced Clock Drivers Devices Freescale Semiconductor NETCOM MPC9315 ...

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... MPC9315. PSELA controls the output phase of the QA0 and QA1 outputs, allowing the user to generate inverted clock signals synchronous to non-inverted clock signals. See also MPC9315 for further reference ...

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... FB1 QB2 FBSEL QB3 QC0 FSELA FSELB QC1 FSELC PSELA MPC9315 80 MHz (Feedback) MPC9315 default configuration (feedback of QB3 = 100 MHz). All control pins are left open. Frequency range Min Input 37.50 MHz QA outputs 75.00 MHz QB outputs 37.50 MHz QC outputs 18.75 MHz Figure 3. MPC9315 Default Configuration ...

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... V and 3.3 V CMOS PLL Clock Generator and Driver Using the MPC9315 in Zero-Delay Applications The external feedback option of the MPC9315 PLL allows for its use as a zero delay buffer. The PLL aligns the feedback clock output edge with the clock input reference edge and virtually eliminates the propagation delay through the device ...

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... CC thus only a single terminated line can be driven by each = 22 µF for output of the MPC9315 clock driver. For the series terminated case, however, there current draw; thus, the outputs V CCA can drive multiple series terminated lines. MPC9315 illustrates an output driving a single series terminated line versus two series terminated lines in parallel ...

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... MPC9315 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver both cases, the drive capability of the MPC9315 output buffer is more than sufficient to drive 50 Ω transmission lines on the incident edge. Note from the delay measurements in the simulations, a delta of only 43 ps exists between the two differently loaded outputs ...

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... CC V ÷ GND ÷ GND t SK(O) Figure 17. Output-to-Output Skew –1/f JIT(PER Figure 19. Period Jitter V =3 2.4 0. Advanced Clock Drivers Devices Freescale Semiconductor NETCOM V CC ÷ GND V CC ÷ GND SK( =2 1.8 V 0.6 V MPC9315 ...

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... V and 3.3 V CMOS PLL Clock Generator and Driver IDT™ 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver Advanced Clock Drivers Devices Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor PACKAGE DIMENSIONS CASE 873A-04 ISSUE C 32-LEAD LQFP PACKAGE 13 NETCOM PAGE MPC9315 MPC9315 13 ...

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... V and 3.3 V CMOS PLL Clock Generator and Driver MPC9315 IDT™ 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc 14 PACKAGE DIMENSIONS CASE 873A-04 ISSUE C 32-LEAD LQFP PACKAGE 14 NETCOM PAGE MPC9315 Advanced Clock Drivers Devices Freescale Semiconductor ...

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... V and 3.3 V CMOS PLL Clock Generator and Driver IDT™ 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver Advanced Clock Drivers Devices Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc Freescale Semiconductor PACKAGE DIMENSIONS CASE 873A-04 ISSUE C 32-LEAD LQFP PACKAGE 15 NETCOM PAGE MPC9315 MPC9315 15 ...

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... MPC92459 MPC9315 PART NUMBERS 900 MHz Low Voltage LVDS Clock Synthesizer 2.5 V and 3.3 V CMOS PLL Clock Generator and Driver INSERT PRODUCT NAME AND DOCUMENT TITLE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc ...