CY7C343B-25HC Cypress Semiconductor Corporation., CY7C343B-25HC Datasheet
CY7C343B-25HC
Specifications of CY7C343B-25HC
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CY7C343B-25HC Summary of contents
Page 1
... Logic Array Blocks (LABs) connected through the Program- mable Inter-connect Array (PIA). There are 8 input pins, one that doubles as a clock pin when needed. The CY7C343B also has 28 I/O pins, each connected to a macrocell (6 for LABs A and C, and 8 for LABs B and D). The remaining 36 macrocells are used for embedded logic ...
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... DC Output Current, per Pin DC Input Voltage Operating Range Range Commercial Industrial ............. –2.0V to+7.0V Military FOR CY7C343B I/O 39 I INPUT 35 INPUT/CLK 34 INPUT 33 GND 32 INPUT 31 I/O 30 I/O 29 7C343B- [1] ...................– +25 mA [1] .........................................– ...
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... O CC Description Test Conditions 1.0 MHz 0V 1.0 MHz OUT parameter refers to low-level TTL output current 464 250: INCLUDING JIG AND SCOPE (b) 1.75V FOR CY7C343B Min. Max. 5.25(5.5) [3] 2.4 0.45 2.0 V +0.3 CC –0.3 0.8 –10 +10 –40 +40 100 100 Max ALL INPUT PULSES 3 ...
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... Exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. The CY7C343B contains circuitry to protect device pins from high static voltages or electric fields; however, normal precautions should be taken to avoid applying any voltage higher than maximum rated voltages ...
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... SYSTEM CLOCK DELAY t ICS CLOCK DELAY t IC FEEDBACK DELAY t FD I/O DELAY t IO Figure 1. CY7C343B Internal Timing Model Over Operating Range Description Min. Com’l/Ind [4] Com’l/Ind Com’l/ Ind [3] Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind [5] Com’ ...
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... Com’l/Ind 4 Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind Com’l/Ind FOR CY7C343B 7C343B-25 7C343B-30 7C343B-35 Min. Max. Min. Max. Min ...
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... SYSTEM CLOCK AT REGISTER t RSU DATA FROM LOGIC ARRAY Document #: 38-03038 Rev. *B USE ULTRA37000 TM FOR ALL NEW DESIGNS AWL LATCH FD t PIA t ICS t RH CY7C343B t ZX HIGH IMPEDANCE STATE CLR PRE FD Page ...
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... External Asynchronous DEDICATED INPUTS OR REGISTERED FEEDBACK ASYNCHRONOUS CLOCK INPUT Document #: 38-03038 Rev. *B USE ULTRA37000 TM FOR ALL NEW DESIGNS EXP t /t PD1 PD2 CO1 AS1 CY7C343B LAC LAD t t COMB AWH AWL Page ...
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... Ordering Information Speed (ns) Ordering Code 25 CY7C343B-25HC/HI CY7C343B-25JC/JI 30 CY7C343B-30JC/JI 35 CY7C343B-35HC/HI CY7C343B-35JC/JI Package Diagrams Document #: 38-03038 Rev. *B USE ULTRA37000 TM FOR ALL NEW DESIGNS Package Name Package Type H67 44-Pin Windowed Leaded Chip Carrier J67 44-Lead Plastic Leaded Chip Carrier J67 44-Lead Plastic Leaded Chip Carrier ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. USE ULTRA37000 TM FOR ALL NEW DESIGNS 44-Lead Plastic Leaded Chip Carrier J67 CY7C343B 51-85003-*A Page ...
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... Document History Page Document Title: CY7C343B 64-Macrocell Max ® EPLD Document Number: 38-03038 REV. ECN NO. Issue Date ** 106461 07/11/01 *A 122237 12/28/02 *B 213375 See ECN Document #: 38-03038 Rev. *B USE ULTRA37000 TM FOR ALL NEW DESIGNS Orig. of Change SZV Change from Spec Number: 38-00862 to 38-03038 RBI ...