TE28F800CEB120 Intel Corporation, TE28F800CEB120 Datasheet
TE28F800CEB120
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TE28F800CEB120 Summary of contents
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SMART 3 ADVANCED BOOT BLOCK 4-MBIT (256K X 16), 8-MBIT (512K X 16), 16-MBIT (1024K X 16) FLASH MEMORY FAMILY 28F400B3, 28F800B3, 28F160B3 n Flexible SmartVoltage Technology 2.7V–3.6V Program/Erase 2.7V–3.6V Read Operation 12V V Fast Production PP Programming n 2.7V ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 7641 Mt. Prospect, IL 60056-7641 or call 1-800-879-4683 or visit Intel’s website at http:\\www.intel.com COPYRIGHT © INTEL CORPORATION 1996, 1997 Third-party brands and names are the property of their respective owners * CG-041493 ...
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INTRODUCTION .............................................5 1.1 Smart 3 Advanced Boot Block Flash Memory Enhancements ..............................5 1.2 Product Overview.........................................6 2.0 PRODUCT DESCRIPTION..............................6 2.1 Package Pinouts ..........................................7 2.2 Block Organization .....................................11 2.2.1 Parameter Blocks ................................11 2.2.2 Main Blocks .........................................11 3.0 PRINCIPLES OF OPERATION .....................14 ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE REVISION HISTORY Number -001 Original version Section 3.4, V Program and Erase Voltages , added -002 PP Updated Figure 9: Automated Block Erase Flowchart Updated Figure 10: Erase Suspend/Resume Flowchart (added program op. to table) ...
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INTRODUCTION This preliminary datasheet contains specifications for the Advanced Boot Block flash memory family, which is optimized for low power, portable systems. This family of products features 1.8V–2.2V or 2.7V–3.6V I/Os and a low V operating range of 2.7V–3.6V ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE 1.2 Product Overview Intel provides the most flexible voltage solution in the flash industry, providing three discrete voltage supply pins: V for read operation CCQ swing, and V for program and erase operation. ...
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Package Pinouts The Smart 3 Advanced Boot Block flash memory is available in 48-lead TSOP (see Figure 1) and 48- ball BGA packages (see Figures 2-4). In Figure 1, pin changes from one density to the next are circled. ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE CCQ 15 F GND D 7 NOTE: Dotted connections indicate ...
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CCQ 15 F GND D 7 NOTE: Dotted connections indicate placeholders where there is no ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE The pin descriptions table details the usage of each device pin. Table 2. 16-Mbit Smart 3 Advanced Boot Block Pin Descriptions Symbol Type ADDRESS INPUTS for memory addresses. Addresses are internally A –A INPUT 0 ...
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Table 2. 16-Mbit Smart 3 Advanced Boot Block Pin Descriptions (Continued) Symbol Type V INPUT OUTPUT V CCQ 2.7V. When this mode is used, the V CC 2.7V–2.85V to achieve lowest power operation (see Section 6.1: DC ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE 16-Mbit Advanced Boot Block FFFFF 4-Kword Block 38 FF000 FEFFF 4-Kword Block 37 FE000 FDFFF 4-Kword Block 36 FD000 FCFFF 4-Kword Block 35 FC000 FBFFF 4-Kword Block 34 FB000 FAFFF 4-Kword Block 33 FA000 F9FFF ...
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Advanced Boot Block FFFFF 32-Kword Block 38 F8000 F7FFF 32-Kword Block 37 F0000 EFFFF 32-Kword Block 36 E8000 E7FFF 32-Kword Block 35 E0000 DFFFF 32-Kword Block 34 D8000 D7FFF 32-Kword Block 33 D0000 CFFFF 32-Kword Block 32 C8000 C7FFF ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE 3.0 PRINCIPLES OF OPERATION Flash memory combines EEPROM functionality with in-circuit electrical program and capability. The Smart 3 Advanced Boot Block flash memory family utilizes a Command User Interface (CUI) and automated algorithms to simplify ...
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READ The flash memory has three read modes available: read array, read identifier, and read status. These modes are accessible independent of the V voltage. The appropriate read mode command must be issued to the CUI to enter the ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE (erase suspend to program, erase suspend to read and program suspend to read) are available only during suspended operations. These modes are reached using the commands summarized in Table 4. A comprehensive chart showing the ...
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Table 4. Command Codes and Descriptions (Continued) Code Device Mode B0 Program Issuing this command will begin to suspend the currently executing Suspend program/erase operation. The status register will indicate when the operation has been successfully suspended by setting either ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE When the WSM is active, SR.7 will indicate the status of the WSM; the remaining bits in the status register indicate whether or not the WSM was successful in performing the desired operation (see Table ...
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ERASE MODE To erase a block, write the Erase Set-up and Erase Confirm commands to the CUI, along with an address identifying the block to be erased. This address is latched internally when the Erase Confirm command is issued. ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Table 6. Command Bus Definitions Command Notes Read Array 5 Intelligent Identifier 2,3.5 Read Status Register 5 Clear Status Register 5 Write (Program) 4,5 Alternate Write (Program) 4,5 Block Erase/Confirm 5 Program/Erase Suspend 5 Program/Erase ...
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Table 7. Status Register Bit Definition WSMS ESS SR.7 WRITE STATE MACHINE STATUS 1 = Ready (WSMS Busy SR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase In Progress/Completed SR.5 = ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Start Write 40H Program Address/Data Read Status Register No SR Yes Full Status Check if Desired Program Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range ...
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Start Write B0H Read Status Register 0 SR SR.2 = Program Completed 1 Write FFH Read Array Data No Done Reading Yes Write D0H Write FFH Program Resumed Read Array Data Figure 8. Program Suspend/Resume Flowchart PRELIMINARY ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Start Write 20H Write D0H and Block Address Read Status Register No 0 SR.7 = Suspend Erase 1 Full Status Check if Desired Block Erase Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See ...
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Start Write B0H Read Status Register 0 SR SR.6 = Erase Completed 1 Write FFH/40H Read Array Data/ Program Array Done No Reading and/or Programming Yes Write D0H Write FFH Erase Resumed Read Array Data Figure 10. ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE 3.3 Block Locking The Smart 3 Advanced Boot Block flash memory architecture features two hardware-lockable parameter blocks so that the kernel code for the system can be kept secure while other parameter blocks are programmed ...
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AUTOMATIC POWER SAVINGS (APS) Automatic Power Savings provides low-power operation during active mode. Power Reduction Control (PRC) circuitry allows the flash to put itself into a low current state when not being accessed. After data is read from the ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE After any program or block erase operation is complete (even after V transitions down the CUI must be reset to read array mode PPLK via the Read Array command if access ...
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ABSOLUTE MAXIMUM RATINGS* Extended Operating Temperature During Read ............................ –40°C to +85°C During Block Erase and Program............................ –40°C to +85°C Temperature Under Bias ......... –40°C to +85°C Storage Temperature................... –65°C to +125°C Voltage on Any Pin (except V , ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE 5.1 DC Characteristics: V CCQ Table 10. DC Characteristics Sym Parameter Notes I Input Load Current Output Leakage Current Standby Current 1,7 CCS Deep Power-Down ...
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Table 10. DC Characteristics (Continued) Sym Parameter Notes I V Program Current 1,4 PPW Erase Current 1,4 PPE Erase Suspend 1,4 PPES PP Current I V Program Suspend 1,4 PPWS PP Current PRELIMINARY SMART ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Table 10. DC Characteristics (Continued) Sym Parameter Notes V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage Lock-Out Voltage 3 PPLK PP ...
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V CCQ V CCQ INPUT 2 0.0 NOTE: AC test inputs are driven at V for a logic “1” and 0.0V for a logic “0.” Input timing begins, and output timing ends CCQ Input rise and fall times ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE 6.0 OPERATING CONDITIONS (V Table 12. Temperature and V Symbol Parameter T Operating Temperature A V 2.7V–2.85V V Supply Voltage CC CC1 V 2.7V–3.3V V Supply Voltage CC CC2 V 1.8V–2.2V I/O Supply Voltage CCQ ...
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Table 13. DC Characteristics: V Sym Parameter Notes I Input Load Current Output Leakage Current Standby Current 1,7 CCS Deep Power-Down 1,7 CCD CC Current I V Read Current 1,5,7 ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Table 13. DC Characteristics: V Sym Parameter Notes I V Program Current 1,4,7 CCW Erase Current 1,4,7 CCE Erase Suspend 1,2,4,7 CCES CC Current I V Program Suspend 1,2,4,7 ...
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Table 13. DC Characteristics: V Sym Parameter Notes V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage Lock-Out Voltage 3 PPLK PP V during Program ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE V CCQ V CCQ INPUT 2 0.0 NOTE: AC test inputs are driven at V for a logic “1” and 0.0V for a logic “0.” Input timing begins, and output timing ends CCQ ...
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AC CHARACTERISTICS AC Characteristics are applicable to both V Table 15. AC Characteristics: Read Operations (Extended Temperature) # Symbol Parameter R1 t Read Cycle Time AVAV R2 t Address to Output Delay AVQV R3 t CE# to Output Delay ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Device and Address Selection V IH ADDRESSES (A) Address Stable CE# ( OE# ( WE# ( High Z ...
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Table 16. AC Characteristics: Write Operations (Extended Temperature) # Symbol Parameter W1 t RP# High Recovery to PHWL WE# (CE#) Going Low t PHEL W2 t CE# (WE#) Setup to ELWL WE# (CE#) Going Low t WLEL W3 t WE# ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE ADDRESSES [ CE#(WE#) [E(W OE# [ WE#(CE#) [W(E High Z DATA [D/Q] ...
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Reset Operations RP# (P) (A) Reset during Read Mode RP# (P) (B) Reset during Program or Block Erase, RP# (P) (C) Reset Program or Block Erase, Figure 17. AC Waveform: Deep Power-Down/Reset Operation Symbol Parameter t RP# Low to ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE Table 17. Erase and Program Timings Sym Parameter t Block Program Time BWPB (Parameter) t Block Program Time (Main) BWMB t Program Time WHQV1 t EHQV1 t Block Erase Time (Parameter) WHQV2 t EHQV2 t ...
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ORDERING INFORMATION Package TE = 48-Lead TSOP GT = 48-Ball µBGA* CSP Product line designator for all Intel Flash products Device Density 160 = x16 (16 ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE WRITE STATE MACHINE CURRENT/NEXT STATES Current SR.7 Data Read Program State When Array Setup Read (FFH) (40/10H) Read Array “1” Array Read Program Array Setup 1 Program “1” Status Pgm. Setup Program “0” Status (Not ...
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ACCESS TIME VS. CAPACITIVE LOAD Access Time vs. Load Capacitance 124 123 122 121 120 119 118 117 116 115 30 50 Load Capacitance(pF) NOTE 2.7V CCQ This chart shows a derating curve for device access time with ...
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SMART 3 ADVANCED BOOT BLOCK–WORD-WIDE ARCHITECTURE BLOCK DIAGRAM V CCQ Output Buffer Power Reduction Control Y-Decoder Input Buffer Address Latch X-Decoder Address Counter 48 APPENDIX Input Buffer Identifier Register Status Register ...
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ADDITIONAL INFORMATION Order Number 1997 Flash Memory Databook 210830 290605 Smart 3 Advanced Boot Block Byte-Wide 8-Mbit (1024K x8), 16-Mbit (2056K x 8) Flash Memory Family Datasheet 292172 AP-617 Additional Flash Data Protection Using V NOTE: 1. Please call the ...