AD9288 Analog Devices, AD9288 Datasheet

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AD9288

Manufacturer Part Number
AD9288
Description
8-Bit, 40/80/100 MSPS Dual A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9288

Resolution (bits)
8bit
# Chan
2
Sample Rate
100MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
1 V p-p
Adc Architecture
Pipelined
Pkg Type
QFP

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a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
REV. 0
GENERAL DESCRIPTION
The AD9288 is a dual 8-bit monolithic sampling analog-to-
digital converter with on-chip track-and-hold circuits and is
optimized for low cost, low power, small size and ease of use.
The product operates at a 100 MSPS conversion rate with out-
standing dynamic performance over its full operating range.
Each channel can be operated independently.
The ADC requires only a single 3.0 V (2.7 V to 3.6 V) power
supply and an encode clock for full-performance operation. No
external reference or driver components are required for many
applications. The digital outputs are TTL/CMOS compatible
and a separate output power supply pin supports interfacing
with 3.3 V or 2.5 V logic.
FEATURES
Dual 8-Bit, 40 MSPS, 80 MSPS, and 100 MSPS ADC
Low Power: 90 mW at 100 MSPS per Channel
On-Chip Reference and Track/Holds
475 MHz Analog Bandwidth Each Channel
SNR = 47 dB @ 41 MHz
1 V p-p Analog Input Range Each Channel
Single +3.0 V Supply Operation (2.7 V–3.6 V)
Standby Mode for Single Channel Operation
Twos Complement or Offset Binary Output Mode
Output Data Alignment Mode
APPLICATIONS
Battery Powered Instruments
Hand-Held Scopemeters
Low Cost Digital Oscilloscopes
I and Q Communications
The encode input is TTL/CMOS compatible and the 8-bit
digital outputs can be operated from +3.0 V (2.5 V to 3.6 V)
supplies. User-selectable options are available to offer a combi-
nation of standby modes, digital data formats and digital data
timing schemes. In standby mode, the digital outputs are driven
to a high impedance state.
Fabricated on an advanced CMOS process, the AD9288 is avail-
able in a 48-lead surface mount plastic package (7
1.4 mm LQFP) specified over the industrial temperature range
(–40 C to +85 C).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
REF
REF
REF
ENC
ENC
A
A
A
A
OUT
IN
IN
IN
IN
IN
IN
A
A
A
B
B
B
A
B
FUNCTIONAL BLOCK DIAGRAM
TIMING
TIMING
8-Bit, 40/80/100 MSPS
World Wide Web Site: http://www.analog.com
T/H
T/H
Dual A/D Converter
AD9288
V
ADC
ADC
REF
D
V
DD
GND
8
8
© Analog Devices, Inc., 1999
V
8
8
DD
AD9288
D7
SELECT #1
SELECT #2
DATA FORMAT
SELECT
D7
A
B
–D0
–D0
A
B
7 mm,

Related parts for AD9288

AD9288 Summary of contents

Page 1

... In standby mode, the digital outputs are driven to a high impedance state. Fabricated on an advanced CMOS process, the AD9288 is avail- able in a 48-lead surface mount plastic package (7 1.4 mm LQFP) specified over the industrial temperature range (– ...

Page 2

... VI 0 2.0 VI 2.45 2.45 VI 0.05 VI 180 218 47 47.0 –2– AD9288BST-40 Typ Max Min Typ Max 8 8 0.5 +1.25 0.5 +1.25 +1.50 +1.50 0.50 +1.25 0.50 +1.25 +1.50 +1.50 Guaranteed 2.5 +6 –6 2 – 1.5 1 512 512 200 ...

Page 3

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9288 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 4

... AD9288 PIN CONFIGURATION GND 1 PIN IDENTIFIER DFS 4 REF AD9288 REF 6 OUT TOP VIEW REF (Not to Scale GND CONNECT PIN FUNCTION DESCRIPTIONS Pin No. Name Description 1, 12, 16, 27, 29, 32, 34, 45 GND Ground Analog Input for Channel A. IN AINA 3 Analog Input for Channel A (Complementary). ...

Page 5

... SAMPLE N+2 SAMPLE N DATA N–3 DATA N–2 DATA N–1 DATA N–4 DATA N–3 DATA N–2 –5– SAMPLE N+5 SAMPLE N DATA N–1 DATA N DATA N+1 DATA N–1 DATA N DATA N+1 SAMPLE N+5 SAMPLE N DATA N DATA N+1 DATA N–1 DATA N DATA N+1 AD9288 ...

Page 6

... AD9288 SAMPLE ENCODE A ENCODE B D7 –D0 DATA N– –D0 DATA N– Figure 3. Data Align with Two Clock Sources ( Channel Timing SAMPLE N+1 SAMPLE N+2 SAMPLE N DATA N–3 DATA N–2 DATA N–1 DATA N–3 DATA N–2 DATA N–1 –6– SAMPLE N+5 ...

Page 7

... HARMONIC = –52.2dBc 3RD HARMONIC = –51.5dBc –30 –40 –50 –60 –70 –80 –90 SAMPLE Figure 6. Spectrum 100 MSPS Single-Ended Input REV. 0 Typical Performance Characteristics–AD9288 72.00 68.00 64.00 60.00 56.00 52.00 48.00 44.00 40.00 0 Figure 7. Harmonic Distortion vs MHz –10 –20 – ...

Page 8

... AD9288 49. 10.3MHz IN SNR SINAD 48.00 47.00 46.00 45. MSPS Figure 10. SINAD/SNR vs. Encode Rate 50.00 SNR SINAD 46.00 42.00 38.00 34.00 30.00 7.0 6.5 6.0 5.5 5.0 ENCODE HIGH PULSEWIDTH – ns Figure 11. SINAD/SNR vs. Encode Pulsewidth High 0.5 ENCODE RATE = 100MSPS 0.0 –0.5 –1.0 – ...

Page 9

... Figure 19. Equivalent Analog Input Circuit Figure 20. Equivalent Reference Input Circuit Figure 21. Equivalent Encode Input Circuit Figure 22. Equivalent Digital Output Circuit ENCODE = 100MSPS Figure 23. Equivalent Reference Output Circuit 1.25 1.5 1.75 –9– AD9288 V D 28k 28k 12k 12k BIAS REF ...

Page 10

... The other option allows the user to skew the B channel output data by 1/2 a clock cycle. In other words, if two clocks are fed to the AD9288 and are 180 out of phase, enabling the data align will allow Channel B output data to be available at the rising edge of Clock A. If the same encode clock is provided to both ...

Page 11

... DAC and latches. The clock inputs are TTL compatible, but should be limited to a maximum Voltage Reference The AD9288 has an internal 1.25 V voltage reference. An ex- ternal reference for each channel may be employed instead. The evaluation board is configured for the internal reference (use jumpers E18–E41 and E17–E19. To use external references, connect to VREFA and VREFB pins on the power connector P1 and use jumpers E20– ...

Page 12

... U3 U5, U6 BILL OF MATERIALS DEVICE Ceramic Cap Tantalum Cap W-HOLE SMBPN TB6 37DRFP Resistor Resistor Resistor Resistor Transformer AD9288 AD9763 74ACQ574 SN74LCX86 –12– PACKAGE VALUE 0603 0.1 F TAJD 10 F W-HOLE SMBP TB6 C37DRFP R1206 50 R1206 25 R1206 2 k R1206 0 T1–1T LQFP48 ...

Page 13

... DVDD1 50 R13 A1 DCOM1 NC3 AVDD MODE NC2 REV 0.1 GND GND GND ENC GND A ENC CLKDACB CLKDACB F 0.1 CLKDACA C7 GND CLKDACA DL V GND GND GND Figure 26 . Dual Evaluation Board Schematic –13– AD9288 GND F 0.1 GND3 GND ENC ENC 0.1 C5 GND ...

Page 14

... AD9288 Figure 27. Printed Circuit Board Top Side Copper Figure 28. Printed Circuit Board Bottom Side Silkscreen Figure 29. Printed Circuit Board Ground Layer Figure 30. Printed Circuit Board “Split” Power Layer –14– REV. 0 ...

Page 15

... Figure 31. Printed Circuit Board Bottom Side Copper REV. 0 Figure 32. Printed Circuit Board Top Side Silkscreen –15– AD9288 ...

Page 16

... AD9288 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead LQFP (ST-48) 0.063 (1.60) MAX 0.354 (9.00) BSC 0.030 (0.75) 0.057 (1.45) 0.276 (7.0) BSC 0.030 (0.75) 0.053 (1.35) 0.018 (0.45) 0.018 (0.45 SEATING PLANE TOP VIEW (PINS DOWN) 0.006 (0.15 0.002 (0.05) 0 MIN 0 – ...

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