TDA9330H Philips Semiconductors, TDA9330H Datasheet
TDA9330H
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DATA SHEET TDA933xH series 2 I C-bus controlled TV display processors Preliminary specification Supersedes data of 2000 May 08 INTEGRATED CIRCUITS 2002 Jun 04 ...
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... Horizontal parallelogram and bow correction 2 I C-bus control of various functions Low dissipation. ORDERING INFORMATION TYPE NUMBER NAME TDA9330H QFP44 TDA9331H TDA9332H 2002 Jun 04 GENERAL DESCRIPTION The TDA933xH series are display processors for ‘High-end’ television receivers which contain the following functions: ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SURVEY OF IC TYPES IC VERSION TDA9330H no TDA9331H yes TDA9332H yes QUICK REFERENCE DATA SYMBOL Supply V supply voltage P I supply current (V P Input voltages V luminance input signal (black-to-white value) i(Y)(b- input signal (peak-to-peak value) i(U)(p-p) ...
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Acrobat reader. white to force landscape pages to be ... BL1 SATURATION YIN CONTROL 27 U UIN SWITCH COLOUR 26 V ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors PINNING SYMBOL PIN VDOA 1 vertical drive output A VDOB 2 vertical drive output B EWO 3 E-W output EHTIN 4 EHT compensation input FLASH 5 flash detection input GND1 6 ground 1 DEC 7 digital supply decoupling VD HOUT 8 horizontal output SCO 9 sandcastle pulse output ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PIN GO 41 green output BO 42 blue output BCL 43 beam current limiting input BLKIN 44 black current input handbook, full pagewidth VDOA VDOB EWO EHTIN FLASH GND1 DEC VD HOUT SCO SCL SDA 2002 Jun TDA933xH ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors FUNCTIONAL DESCRIPTION RGB control circuit I NPUT SIGNALS The RGB control circuit of the TDA933xH contains three sets of input signals: YUV input signals, which are supplied by the input processor or the feature box. Bit GAI can be used to switch the luminance input signal sensitivity between 0 ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 2 Via the I C-bus, an adjustable offset can be made on the black level of red and green channels with respect to the level that is generated by the black current control loop. These controls can be used to adjust the colour temperature of the dark part of the picture, independent of the white point adjustment ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors When no horizontal flyback pulse is detected during three consecutive line periods, status bit NHF is set (output status byte 01-D3; see Table 3). The horizontal drive signal is switched on and off via the so-called slow-start/slow-stop procedure. This function is realized by varying the t of the horizontal drive pulse ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors The minimum value for the vertical wait setting is 8 line periods. If the setting is lower than 8, the wait period will remain at 8 line periods. The E-W drive circuit has a single-ended output. The E-W geometry can be adjusted on the following parameters: Horizontal width with increased range because of the ‘ ...
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... Black level offset R Black level offset G Horizontal timing E-W lower corner/parabola (1) Horizontal bow Notes 1. For zero parallelogram and bow correction use register value 7 DEC. 2. See Chapter “Characteristics”; note 47. 3. Bit VGA is not available in the TDA9330H. 2002 Jun 04 SUBADDRESS (HEX MAT EBB ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors Table 3 Output status bits SUBADDRESS FUNCTION Output status bytes Input control bits Table 4 Colour difference matrix MAT MUS MATRIX POSITION NTSC Japan 1 1 Table 5 Enable ‘blue-back’ EBB MODE 0 blue-black switched off 1 blue-black switched on ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors Table 15 Cathode drive level (15 steps; 3.6 V/step) SETTING OF CATHODE CL3 CL2 CL1 CL0 DRIVE AMPLITUDE Note 1. The given values are valid for the following conditions: a) Nominal CVBS input signal. b) Settings for contrast and white point nominal. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors Table 26 Multi-sync mode VGA MODE horizontal frequency fixed by internal 0 reference 1 multi-sync function switched on Table 27 Extended slow start mode ESS EXTENDED SLOW START MODE 0 not active 1 active Table 28 Long blanking mode LBM BLANKING MODE 0 adapted to standard ( Hz) 1 fi ...
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... BCF Table 50 Indication of flash detection no FLS Table 51 Locking of reference oscillator to crystal no NRF (1) Table 52 Indication of output black level below or above HBC Note 1. See Chapter “Characteristics”; note 16. TDA9330H Table 53 Polarity of H TDA9332H HPOL TDA9331H 15 Preliminary specification TDA933xH series N3 MASK VERSION version ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors Table 54 Polarity of V input pulse D VPOL 0 1 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER V supply voltage P T storage temperature stg T ambient temperature amb T soldering temperature sol T junction temperature ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors CHARACTERISTICS unless otherwise specified. P amb SYMBOL PARAMETER Supplies AIN SUPPLY PINS AND V supply voltage P1 V power-on reset voltage level POR I supply current P1 P total power dissipation tot 22; see note 2 OW POWER START UP PIN ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER t delay difference for the three d channels F (RGB-1); AST BLANKING INPUT PIN V input voltage i(BL1) t delay difference between insertion d to RGB out and RGB in to RGB out I input current i(BL1) SS suppression of internal RGB ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER General t delay difference between insertion d to RGB out and RGB in to RGB out I input current i(BL2) SS suppression of internal RGB int signals SS suppression of external RGB ext signals C ; note 3 OLOUR DIFFERENCE MATRICES PAL/SECAM mode; the matrix results in the following signal ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER B ; note 10 LACK LEVEL STRETCHER V maximum black level shift bl(max) V black level shift bl RGB : 40 AMPLIFIER OUTPUTS PINS V output signal amplitude 40-42(b-w) (black-to-white value) V output voltage range o Z output impedance o I sink current sink V output signal amplitude for the ‘ ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER V relative variation in black level bl between the three channels during variations of supply voltage ( 10%) saturation (50 dB) contrast (20 dB) brightness ( 0.5 V) temperature (range 40 C) S/N signal-to-noise ratio of the output signals B luminance bandwidth of output o(Y)(10pF) ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER I internal charge current ch(int) I maximum discharge current when dch(max) the PWL is active P ; note 19 EAK WHITE LIMITER I charge current PWL filter pin ch(PWL) I discharge current PWL filter pin dch(PWL) V Y-input signal amplitude at which ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER I ; NTERNAL REFERENCE SIGNAL CRYSTAL OR RESONATOR CONNECTED TO PINS f resonator frequency xtal R resonator series resistance s(xtal) V stabilized input signal i(stab)(p-p) (peak-to-peak value) g maximum transconductance m(max) Z input impedance i C input capacitance i C output capacitance ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER control sensitivity for dynamic phase compensation V input voltage range for dynamic i(DP)(comp) phase compensation Z input impedance i t maximum range of parallelogram par(cor)(max) correction t maximum range of bow correction bow(cor)(max ORIZONTAL FLYBACK INPUT ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER I guard pulse input current required i(grd) to stop the blanking after a vertical blanking period t pulse width pulse width delay between start H d(bk-HD) start of clamp pulse Vertical synchronization and geometry processing INPUT SIGNAL ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER I discharge current dch I charge current set by external ch(ext)(R) resistor Slope vertical slope vert I charge current increase ch V LOW-voltage level of ramp rampL ERTICAL DRIVE OUTPUTS PINS I differential output current o(ver)(p-p) (peak-to-peak value) ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER V ERTICAL AMPLITUDE CR control range I equivalent differential vertical drive o(eq)(diff)(p-p) output current (peak-to-peak value) V ERTICAL SHIFT CR control range I equivalent differential vertical drive o(eq)(diff)(p-p) output current (peak-to-peak value) S- CORRECTION CR control range ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SYMBOL PARAMETER DAC ; 25; note 47 OUTPUT PIN V minimum output voltage o(min) V maximum output voltage o(max) Z output impedance o I output current o Notes 1. The normal operation of the IC is guaranteed for a supply voltage between 7.2 and 8.8 V. When the supply voltage drops below the POR level, status bit POR is set and the horizontal output is switched off ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors Note that the “YUV” input of the TDA933xH is actually and (B Y) input. When the TV set has an input for a YPBPR signal with amplitudes of 0.7 V for all three components, the signals should be amplified and (R Y) signals as follows: ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 13. The timing of the horizontal blanking pulse on the RGB outputs is illustrated in Fig.10. a) The start of the blanking pulse is determined by an internal counter blanking that starts 40 LLC (line locked clock) pulses before the centre of the horizontal flyback pulse. This is 5.8 s for 1fH and 2.9 s for 2fH TV mode. The end of the blanking is determined by the trailing edge of the flyback pulse ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 19. The control circuit contains a PWL circuit and a soft clipper. a) The detection level of the PWL can be adjusted via the I This amplitude is related to the Y input signal, typical amplitude 1 V (b-w), at maximum contrast setting. The detector measures the amplitude of the RGB signals after the contrast control. The output signal of the PWL detector is filtered by an external capacitor, so that short transients in the video signal do not activate the limiting action ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 25. The set is switched off via the mains power switch. When the mains supply is switched off, the supply voltage of the line deflection circuit of the TV set will decrease. A detection circuit must be made that monitors this supply voltage. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 35. For safe operation of the horizontal output transistor and to obtain a controlled switch-on time of the EHT, the horizontal drive starts slow start mode. The horizontal drive starts with a very short ‘on-time’ of the horizontal output transistor (line locked clock pulse, i.e. 72 ns), the ‘off-time’ of the transistor is identical to the ‘off-time’ in normal operation ...
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... The operation is different for the various scan modes, see Table 55 and Figs 12 and 13. The minimum value for the vertical wait is 8 line periods. If the setting is lower than 8, the wait period will remain 8 line periods. 47. In the TDA9330H and TDA9332H, the DAC output proportional to the centre frequency of the line-oscillator mode, the output voltage will always be at the minimum value ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, halfpage 100 handbook, full pagewidth blending (%) 0.2 0.31 Fig.4 Blending characteristic (typical curve and minimum/maximum limits). 2002 Jun 100 k XTALI Fig.3 Simplified diagram of crystal oscillator. 0.4 0.6 0.8 0.725 35 Preliminary specification TDA933xH series ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 300 handbook, halfpage (%) 200 100 DAC (decimal value) Fig.5 Saturation control curve. handbook, halfpage 1 (V) 0 DAC (decimal value) Conditions: settings for cathode drive and white point nominal; gain of RGB amplifiers such that the amplitude at the RGB outputs (b-w) ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, full pagewidth V o(RGB)(b-w) 2002 Jun 04 4 (V) 3 tangent PWL input level Fig.9 Soft clipper characteristic. 37 Preliminary specification TDA933xH series MGS895 clipper off B PWL output level clipper 100 YIN (IRE) ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, full pagewidth H D input pulse wide blanking (if HBL = 1) horizontal flyback pulse flyback blanking counter blanking video blanking 1) Position of wide blanking can be adjusted with bus bits HB3 to HB0. 2) Start of line blanking can be adjusted with bus bits LBL3 to LBL0. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, full pagewidth 2f H NTSC signal ( 31.47 kHz input CLP pulse counter 16 LLC blanking HDTV signal ( 33.75 kHz input CLP pulse counter 16 LLC blanking Video signals are shown as illustration only. All horizontal timing signals in the IC are solely related to the start of the H that is applied to the IC ...
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Acrobat reader. white to force landscape pages to be ... RESET LINE COUNTER 625 Video from HIP ...
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Acrobat reader. white to force landscape pages to be ... RESET LINE COUNTER Internal 2f H clock AKB pulses Vertical ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, full pagewidth vertical position (%) Fig.14 Vertical drive waveform and blanking pulse for different zoom factors. 2002 Jun 04 70 top picture 60 50 138% 40 100 bottom 60 picture blanking for zoom 138% 42 Preliminary specification ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, full pagewidth 100 nominal value) slow start Fig.15 Slow start behaviour of horizontal output, and slow stop behaviour and timing of picture tube discharge pulse when IC is switched to standby via I handbook, full pagewidth 0.5 0.5 ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors handbook, full pagewidth CLK 2H HBLNK CLK 2H HBLNK (a) End pulse is reference (VSR = 0) See also Chapter “Characteristics”; note 41. 2002 Jun CLK 2H HBLNK field 1 detection CLK 2H HBLNK field 2 detection Fig.17 Field detection mechanism. 44 Preliminary specification ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors TEST AND APPLICATION INFORMATION RGB-1 handbook, full pagewidth TUNER AGC SAW IF FILTER CVBS-1 AV-1 CVBS-2 AV-2 CVBS/Y-3 C-3 CVBS/Y-4 C-4 CVBS(TXT) CVBS(PIP) 2002 Jun 04 RGB FEATURE TDA932xH BOX CVBS Y C COMB FILTER Fig.18 Application diagram. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 600 handbook, halfpage (3) I vert ( A) (2) 400 (1) 200 0 200 400 600 0 0.5 t VSH = 31 VERT 2(VDOB) 1(VDOA 31. ( 63. Fig.19 Control range of vertical amplitude. 600 handbook, halfpage I vert ( A) 400 (1) (2) 200 (3) 0 200 400 600 0 0 ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 1200 handbook, halfpage (1) 1000 800 (2) 600 400 (3) 200 31 31. ( 63. Fig.23 Control range of E-W width. 900 handbook, halfpage 800 (2) 700 (3) 600 500 400 300 63 31. ( 63. Fig.25 Control range of E-W corner/parabola ratio. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors Adjustment of geometry control parameters The deflection processor of the TDA933xH offers 15 control parameters for picture alignment, as follows: For the vertical picture alignment; S-correction Vertical amplitude Vertical slope Vertical shift Vertical zoom Vertical scroll Vertical wait. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors PACKAGE OUTLINE QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1. pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 1.85 mm 2.10 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). ...
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... This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specifi ...
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... Philips Semiconductors customers using or selling these products for use in such applications their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes reserves the right to make changes, without notice, in the ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 2002 Jun 04 NOTES 53 Preliminary specification TDA933xH series ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 2002 Jun 04 NOTES 54 Preliminary specification TDA933xH series ...
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... Philips Semiconductors 2 I C-bus controlled TV display processors 2002 Jun 04 NOTES 55 Preliminary specification TDA933xH series ...
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... Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. ...