HD74HC74P Renesas Electronics Corporation., HD74HC74P Datasheet

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HD74HC74P

Manufacturer Part Number
HD74HC74P
Description
Dual D-type Flip-Flops (with Preset and Clear)
Manufacturer
Renesas Electronics Corporation.
Datasheet

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HD74HC78
Dual J-K Flip-Flops
(with Preset, Common Clear and Common Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. Each
flip-flop has independent J, K, and preset inputs and Q and Q outputs. Two flip-flops are controlled by a common clear
and a common clock. Preset and clear are independent of the clock and accomplished by a low logic level on the
corresponding input.
Features
Note: Please consult the sales office for the above package availability.
Function Table
H :
L :
X :
Note:
Rev.2.00, Oct 06, 2005 page 1 of 6
HD74HC78FPEL
HD74HC78RPEL
High Speed Operation: t
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
Low Input Current: 1 A max
Low Quiescent Supply Current: I
Ordering Information
Preset
Part Name
H
H
H
H
H
H
H
H
L
L
High level
Low level
Irrelevant
1. Q and Q will remain High as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and
Clear go High simultaneously.
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC)
Clear
H
H
H
H
H
H
H
H
L
L
Package Type
pd
(Clock to Q) = 20 ns typ (C
CC
= 2 to 6 V
CC
Inputs
Clock
(static) = 2 A max (Ta = 25 C)
X
X
X
H
L
PRSP0014DF-B
(FP-14DAV)
PRSP0014DE-A
(FP-14DNV)
(Previous Code)
Package Code
L
X
X
X
H
H
X
X
X
J
L
L
= 50 pF)
FP
RP
Abbreviation
Package
K
X
H
H
X
X
L
L
X
X
X
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Taping Abbreviation
(Previous ADE-205-425)
H
Q
H
H
L
L
*1
No change
No change
No change
No change
(Quantity)
REJ03D0553-0200
Outputs
Toggle
Oct 06, 2005
Rev.2.00
H
Q
H
H
L
L
*1

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HD74HC74P Summary of contents

Page 1

HD74HC78 Dual J-K Flip-Flops (with Preset, Common Clear and Common Clock) Description This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock pulse. Each flip-flop has independent J, K, and preset ...

Page 2

HD74HC78 Pin Arrangement Logic Diagram (1/2) PR CLR Other FF Rev.2.00, Oct 06, 2005 page 1PR 2 CK CLR ...

Page 3

HD74HC78 Absolute Maximum Ratings Item Supply voltage range Input / Output voltage Input / Output diode current Output current V , GND current CC Power dissipation Storage temperature Note: The absolute maximum ratings are values, which must not individually be ...

Page 4

HD74HC78 Switching Characteristics (C Item Symbol V CC Maximum clock f 2.0 max frequency 4.5 6.0 Propagation delay 2.0 PLH PHL time 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Pulse width t 2.0 w 4.5 6.0 ...

Page 5

HD74HC78 Waveforms • Waveform − 1 Clock • Waveform − Clear Preset Input waveform: PRR ≤ 1 MHz Ω, t Notes: 2. The ...

Page 6

HD74HC78 Package Dimensions JEITA Package Code RENESAS Code P-SOP14-3.95x8.65-1.27 PRSP0014DE Index mark JEITA Package Code RENESAS Code P-SOP14-5.5x10.06-1.27 PRSP0014DF Index mark Rev.2.00, Oct ...

Page 7

Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

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