W29C011A-15 Winbond, W29C011A-15 Datasheet

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W29C011A-15

Manufacturer Part Number
W29C011A-15
Description
128K X 8 CMOS FLASH MEMORY
Manufacturer
Winbond
Datasheet

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GENERAL DESCRIPTION
The W29C011A is a 1-megabit, 5-volt only CMOS flash memory organized as 128K
device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V
not required. The unique cell architecture of the W29C011A results in fast program/erase operations
with extremely low current consumption (compared to other comparable 5-volt flash memory
products). The device can also be programmed and erased using standard EPROM programmers.
FEATURES
Single 5-volt program and erase operations
Fast page-write operations
Fast chip-erase operation: 50 mS
Read access time: 150 nS
Page program/erase cycles: 1,000
Ten-year data retention
Software and hardware data protection
128 bytes per page
Page program cycle: 10 mS (max.)
Effective byte-program cycle time: 39 S
Software-protected data write
128K
- 1 -
8 CMOS FLASH MEMORY
Available packages: 32-pin 600 mil DIP, 450
Low power consumption
Automatic program timing with internal V
generation
End of program detection
Latched address and data
TTL compatible I/O
JEDEC standard byte-wide pinouts
mil SOP and PLCC
Active current: 25 mA (typ.)
Standby current: 20 A (typ.)
Toggle bit
Data polling
Preliminary W29C011A
Publication Release Date: December 1997
8 bits. The
Revision A1
PP
PP
is

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W29C011A-15 Summary of contents

Page 1

... The W29C011A is a 1-megabit, 5-volt only CMOS flash memory organized as 128K device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V not required. The unique cell architecture of the W29C011A results in fast program/erase operations with extremely low current consumption (compared to other comparable 5-volt flash memory products) ...

Page 2

... DQ1 14 DQ2 15 GND 32-pin 9 PLCC DQ0 Preliminary W29C011A BLOCK DIAGRAM A14 28 A13 A11 24 OE A10 DQ7 21 20 DQ6 . 19 DQ5 A16 18 DQ4 17 DQ3 PIN DESCRIPTION SYMBOL A14 29 A13 28 A0 A16 DQ0 DQ7 A11 A10 DQ7 GND OUTPUT CONTROL BUFFER CORE DECODER ARRAY ...

Page 3

... FUNCTIONAL DESCRIPTION Read Mode The read operation of the W29C011A is controlled by CE and OE, both of which have to be low for the host to obtain data from the outputs used for device selection. When CE is high, the chip is de-selected and only standby power will be consumed the output control and is used to gate data from the output pins ...

Page 4

... Hardware Data Protection The integrity of the data stored in the W29C011A is also hardware protected in the following ways: (1) Noise/Glitch Protection pulse of less than duration will not initiate a write cycle. (2) V Power Up/Down Detection: The programming operation is inhibited when V DD 3.8V. (3) Write Inhibit Mode: Forcing OE low, CE high high will inhibit the write operation. This prevents inadvertent writes during power-up or power-down periods ...

Page 5

... TABLE OF OPERATING MODES Operating Mode Selection Operating Range = (Ambient Temperature), V MODE Read Write Standby Write Inhibit Output Disable 5-Volt Software Chip Erase Product ID Preliminary W29C011A 0V ADDRESS A1-A16 = A1-A16 = 12V HH PINS DQ. Dout Din High Z High Z/D OUT High Z/D OUT High Manufacturer Code ...

Page 6

... Command Codes for Software Data Protection Write BYTE SEQUENCE 0 Write 1 Write 2 Write Software Data Protection Acquisition Flow Notes for software program code: Data Format: DQ7 DQ0 (Hex) Address Format: A14 A0 (Hex) Preliminary W29C011A ADDRESS DATA 5555H AAH 2AAAH 55H 5555H A0H ...

Page 7

... BYTE SEQUENCE 0 Write 1 Write 2 Write 3 Write 4 Write 5 Write Software Chip Erase Acquisition Flow Notes for software chip erase: Data Format: DQ7 DQ0 (Hex) Address Format: A14 A0 (Hex) Preliminary W29C011A ADDRESS 5555H 2AAAH 5555H 5555H 2AAAH 5555H Load data AA to address 5555 ...

Page 8

... Notes for software product identification: (1) Data format: DQ7 DQ0 (Hex); address format: A14 A0 (Hex). (2) A1 A16 = V ; manufacture code is read for (3) The device does not remain in identification mode if power down. (4) The device returns to standard operation mode. Preliminary W29C011A SOFTWARE PRODUCT IDENTIFICATION ENTRY DATA 5555H AAH 2AAAH ...

Page 9

... Current Input Low Voltage V IL Input High Voltage V IH Output Low Voltage V OL Output High Voltage V OH Power-up Timing PARAMETER Power-up to Read Operation Power-up to Write Operation Preliminary W29C011A TEST CONDITIONS all I/Os open Address inputs = MHz , all I/Os open IH Other inputs = V ...

Page 10

... I/O Pin Capacitance C Input Capacitance C AC CHARACTERISTICS AC Test Conditions ( PARAMETER Input Pulse Levels Input Rise/Fall Time Input/Output Timing Level Output Load AC Test Load and Waveforms Input/Output 2.4V 0.45V Preliminary W29C011A CONDITIONS I/O I 0.45V to 2. 0.8V/2.0V 1 TTL Gate and C +5V D OUT 100 pF 2 ...

Page 11

... WE High Width Data Setup Time Data Hold Time Byte Load Cycle Time Byte Load Cycle Time-out Note: All AC timing signals observe the following guidelines for determining setup and hold times: (a) High level signal's reference level is V Preliminary W29C011A SYM. W29C011A-15 MIN. T 150 ...

Page 12

... Data Polling and Toggle Bit Timing Parameters PARAMETER OE to Data Polling Output Delay CE to Data Polling Output Delay OE to Toggle Bit Output Delay CE to Toggle Bit Output Delay TIMING WAVEFORMS Read Cycle Timing Diagram Address A16 High-Z DQ7-0 Preliminary W29C011A SYM. W29C011A-15 MIN OEP T - CEP T - OET T - CET ...

Page 13

... Address A16-0 5555 DQ6 SW0 Notes: Refer to " Controlled Write Cycle Timing Diagram" for a detailed timing diagram. Controlled Write Cycle Timing Diagram WE Address A16 DQ7-0 Preliminary W29C011A Byte/page load Three-byte sequence for cycle starts 2AAA 5555 BLC T WPH Byte 0 SW1 SW2 T ...

Page 14

... Timing Waveforms, continued Controlled Write Cycle Timing Diagram CE Address A16 High Z DQ7-0 Polling Timing Diagram DATA Address A16 DQ7-0 Preliminary W29C011A CPH OES T OEH T DS Data Valid CEP T OEH T OEP BLCO T WC Internal Write Starts T OES X X ...

Page 15

... Timing Waveforms, continued Toggle Bit Timing Diagram Address A16 DQ6 5 Volt-Only Software Chip Erase Timing Diagram Address A16-0 5555 DQ7 SW0 Preliminary W29C011A T OEH T WC Six-byte code for 5V-only software chip erase 2AAA 5555 5555 2AAA BLC T WPH SW1 SW2 SW3 ...

Page 16

... ORDERING INFORMATION PART NO. ACCESS TIME (nS) W29C011A-15 150 W29C011AS-15 150 W29C011AP-15 150 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. ...

Page 17

... PACKAGE DIMENSIONS 32-pin P-DIP 32-pin SO Wide Body Seating Plane Preliminary W29C011A Base Plane 1 Seating Plane Detail See Detail Dimension in inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.210 5.33 A 0.010 0. 0.150 0.155 0.160 3.81 3.94 4. 0.016 0.018 0.022 0.41 ...

Page 18

... Package Dimensions, continued 32-pin PLCC Seating Plane VERSION HISTORY VERSION DATE A1 Dec. 1997 Preliminary W29C011A PAGE Initial Issued - 18 - Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.140 3.56 A 0.020 0. 0.105 0.110 0.115 2.67 2.80 2. 0.026 0.032 0.66 0.81 ...

Page 19

... No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. Preliminary W29C011A Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U ...

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