SCN2661AC1N28 Philips Semiconductors, SCN2661AC1N28 Datasheet

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SCN2661AC1N28

Manufacturer Part Number
SCN2661AC1N28
Description
5 V, enhanced programmable communication interface (EPCI)
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
DESCRIPTION
The Philips Semiconductors SCN2661 EPCI is a universal
synchronous/asynchronous data communications controller chip
that is an enhanced version of the SCN2651. It interfaces easily to
all 8-bit and 16-bit microprocessors and may be used in a polled or
interrupt driven system environment. The SCN2661 accepts
programmed instructions from the microprocessor while supporting
many serial data communications disciplines —synchronous and
asynchronous — in the full- or half-duplex mode. Special support
for BISYNC is provided.
The EPCI serializes parallel data characters received from the
microprocessor for transmission. Simultaneously, it can receive
serial data and convert it into parallel data characters for input to the
microcomputer.
The SCN2661 contains a baud rate generator which can be
programmed to either accept an external clock or to generate
internal transmit or receive clocks. Sixteen different baud rates can
be selected under program control when operating in the internal
clock mode. Each version of the EPCI (A, B, C) has a different set
of baud rates.
FEATURES
OTHER FEATURES
1994 Apr 27
Synchronous operation
– 5- to 8-bit characters plus parity
– Single or double SYN operation
– Internal or external character synchronization
– Transparent or non-transparent mode
– Transparent mode DLE stuffing (Tx) and detection (Rx)
– Automatic SYN or DLE-SYN insertion SYN, DLE and DLESYN
– Odd, even, or no parity
– Local or remote maintenance loopback mode
– Baud rate: DC to 1Mbps (1X clock)
Asynchronous operation
– 5- to 8-bit characters plus parity
– 1, 1-1/2 or 2 stop bits transmitted
– Odd, even, or no parity
– Parity, overrun and framing error detection
– Line break detection and generation
– False start bit detection
– Automatic serial echo mode (echoplex)
– Local or remote maintenance loopback mode
– Baud rate: DC to 1Mbps
Internal or external baud rate clock
3 baud rate sets
16 internal rates for each set
Double-buffered transmitter and receiver
Enhanced programmable communications
interface (EPCI)
stripping
DC to 62.5kbps (16X clock)
DC to 15.625kbps
(1X clock)
(64X clock)
1
PIN CONFIGURATIONS
APPLICATIONS
Dynamic character length switching
Full- or half-duplex operation
TTL compatible inputs and outputs
RxC and TxC pins are short-circuit protected
Single +5V power supply
No system clock required
Intelligent terminals
Network processors
Front-end processors
Remote data concentrators
Computer-to-computer links
Serial peripherals
BISYNC adaptors
CORNER
NOTE:
Pin Functions the same as 28-pin DIP.
TxC/XSYNC
INDEX
RxRDY
GND
R/W
RxD
CE
D6
D2
D3
D4
D5
D7
A1
A0
11
5
10
12
13
14
11
1
2
3
4
5
6
7
8
9
12
4
SCN2661/SCN68661
TOP VIEW
PLCC
DIP
1
26
18
28
27
26
25
24
23
22
21
20
19
18
17
16
15
25
19
D1
D0
V
RxC/BKDET
DTR
RTS
DSR
RESET
BRCLK
TxD
TxEMT/DSCHG
CTS
DCD
TxRDY
Product specification
CC
853-1070 12793
SD00077

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SCN2661AC1N28 Summary of contents

Page 1

... Philips Semiconductors Enhanced programmable communications interface (EPCI) DESCRIPTION The Philips Semiconductors SCN2661 EPCI is a universal synchronous/asynchronous data communications controller chip that is an enhanced version of the SCN2651. It interfaces easily to all 8-bit and 16-bit microprocessors and may be used in a polled or interrupt driven system environment. The SCN2661 accepts programmed instructions from the microprocessor while supporting many serial data communications disciplines — ...

Page 2

... Over recommended free-air operating temperature range and supply voltage range unless otherwise specified. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 1994 Apr +5V +5% CC Commercial +70 C SCN2661BC1F28 SCN2661CC1F28 SCN2661AC1N28 SCN2661BC1N28 SCN2661CC1N28 SCN2661AC1A28 SCN2661BC1A28 SCN2661CC1A28 DATA BUS BUFFER HOLDING REGISTER BAUD RATE ...

Page 3

... Philips Semiconductors Enhanced programmable communications interface (EPCI) DC ELECTRICAL CHARACTERISTICS SYMBOL SYMBOL PARAMETER PARAMETER Input voltage V Low IL V High IH Output voltage V Low High OH I Input leakage current IL 3-State output leakage current I Data bus high LH I Data bus low LL I Power supply current ...

Page 4

... Philips Semiconductors Enhanced programmable communications interface (EPCI) AC ELECTRICAL CHARACTERISTICS SYMBOL SYMBOL PARAMETER PARAMETER Pulse width t Reset RES t Chip enable CE Setup and hold time t Address setup AS t Address hold AH t R/W control setup CS t R/W control hold CH t Data setup for write ...

Page 5

... Philips Semiconductors Enhanced programmable communications interface (EPCI) the communication technique) and outputs a composite serial stream of data on the TxD output pin. Modem Control The modern control section provides interfacing for three input signals and three output signals used for “handshaking” and status indication between the CPU and a modem ...

Page 6

... Philips Semiconductors Enhanced programmable communications interface (EPCI) 68661C (BRCLK = 5.0688MHz) MR23–20 BAUD RATE 0000 50 0001 75 0010 110 0011 134.5 0100 150 0101 300 0110 600 0111 1200 1000 1800 1001 2000 1010 2400 1011 3600 1100 4800 1101 7200 1110 ...

Page 7

... Philips Semiconductors Enhanced programmable communications interface (EPCI) Table 2. CPU-Related Signals INPUT/ PIN NAME PIN NO. OUTPUT RESET 21 I A0, A1 12, D0–D7 27,28,1,2,5–8 I/O TxRDY 15 O RxRDY 14 O TxEMT/ CHG Table 3. Device-Related Signals INPUT/ PIN NAME PIN NO. OUTPUT BRCLK 20 I RxC/BKDET ...

Page 8

... Philips Semiconductors Enhanced programmable communications interface (EPCI) Transmitter The EPCI is conditioned to transmit data when the CTS input is Low and the TxEN command register bit is set. The 68661 indicates to the CPU that it can accept a character for transmission by setting the TxRDY status bit and asserting the TxRDY output. When the CPU writes a character into the transmit data holding register, these conditions are negated ...

Page 9

... Philips Semiconductors Enhanced programmable communications interface (EPCI) Table 4. 68661 Register Addressing 1994 Apr 27 R/W X 3-State data bus 0 Read receive holding register 1 Write transmit holding register 0 Read status register 1 Write SYN1/SYN2/DLE registers 0 Read mode register 1/2 1 Write mode register 1/2 0 Read command register ...

Page 10

... Philips Semiconductors Enhanced programmable communications interface (EPCI) Table 5. Mode Register 1 (MR1) MR17 MR16 MR15 Sync/Async Parity Type Async: Stop bit length 00 = invalid 0 = Odd stop bit 1 = Even 1/2 stop bits stop bits Sync: Sync: Number of Transparency SYN char control 0 = Double SYN 0 = Normal ...

Page 11

... Sixteen rates are selectable for each EPCI version (–1,–2,–3). Versions 1 and 2 specify a 4.9152MHz TTL input at BRCLK (pin 20); version 3 specifies a 5.0688MHz input which is identical to the Philips Semiconductors 2651. MR23 – 20 are don’t cares if external clocks are selected (MR25 – MR24 = 0). The individual rates are given in Table 1. ...

Page 12

... Philips Semiconductors Enhanced programmable communications interface (EPCI) 1. The transmitter output is connected to the receiver input. 2. DTR is connected to DCD and RTS is connected to CTS. 3. The receiver is clocked by the transmit clock. 4. The DTR, RTS and TxD outputs are held High. 5. The CTS, DCD, DSR and RxD inputs are ignored. ...

Page 13

... Philips Semiconductors Enhanced programmable communications interface (EPCI) Table 9. 68661 EPCI vs 2651 PCI FEATURE 1. MR2 BIT DLE detect – SR3 3. Reset of SR3, DLE detect 4. Send DLE – CR3 5. DLE stuffing in transparent mode 6. SYN1 stripping in double sync non-transparent mode 7. Baud rate versions 8. Terminate ASYNC transmission (drop RTS) 9 ...

Page 14

... Philips Semiconductors Enhanced programmable communications interface (EPCI) TIMING DIAGRAMS RESET RESET t RES TRANSMIT 1 BIT TIME (1, 16 CLOCK PERIODS) TxC (INPUT) TxD t TxD t TCS TxC (OUTPUT R – (WRITE) D – FLOATING (READ) 1994 Apr 27 BRCLK, TxC, RxC RxD t TxD RxC (IX) READ AND WRITE ...

Page 15

... Philips Semiconductors Enhanced programmable communications interface (EPCI) TIMING DIAGRAMS (Continued) TxRDY, TxEMT (Shown for 5-bit characters, no parity, 2 stop bits [in asynchronous mode]) TxC (1X TxD DATA 1 TxEN TxRDY TxEMT CE FOR WRITE OF THR DATA 1 DATA TxD DATA 1 TxEN TxRDY TxEMT CE FOR WRITE OF THR DATA 1 ...

Page 16

... Philips Semiconductors Enhanced programmable communications interface (EPCI) TIMING DIAGRAMS (Continued) 1X RxC t es XSYNC RxD X 0 RxC + RxD MISSING STOP BIT DETECTED SET FE BIT* NOTE the stop bit is present, the start bit search will commence immediately. 1994 Apr 27 EXTERNAL SYNCHRONIZATION WITH XSYNC ...

Page 17

... Philips Semiconductors Enhanced programmable communications interface (EPCI) TIMING DIAGRAMS (Continued) RxRDY (Shown for 5-bit characters, no parity, 2 stop bits [in asynchronous mode]) RxC RxD SYN 1 RxEN SYNDET STATUS BIT RxRDY CE FOR READ READ STATUS RxD DATA 1 RxEN RxRDY OVERRUN STATUS BIT CE FOR READ ...

Page 18

... Philips Semiconductors Enhanced programmable communications interface (EPCI) TYPICAL APPLICATIONS ASYNCHRONOUS INTERFACE TO CRT TERMINAL 8 SCN2661/68661 BRCLK ASYNCHRONOUS INTERFACE TO TELEPHONE LINES 8 SCN2661/68661 BRCLK 1994 Apr 27 ADDRESS BUS CONTROL BUS DATA BUS RxD EIA TO TTL CONVERT (OPT) TxD BAUD RATE CLOCK OSCILLATOR ADDRESS BUS ...

Page 19

... Philips Semiconductors Enhanced programmable communications interface (EPCI) TYPICAL APPLICATIONS (Continued) SYNCHRONOUS INTERFACE TO TERMINAL OR PERIPHERAL DEVICE ADDRESS BUS CONTROL BUS DATA BUS SCN2661/68661 SYNCHRONOUS INTERFACE TO TELEPHONE LINES SCN2661/68661 1994 Apr 27 RxD TxD SYNCHRONOUS RxC TERMINAL OR PERIPHERAL TxC DEVICE ADDRESS BUS CONTROL BUS ...

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