MC10H131P Motorola, MC10H131P Datasheet
MC10H131P
Manufacturer Part Number
MC10H131P
Description
Dual D type master-slave flip-flop
Manufacturer
Motorola
Datasheet
1.MC10H131P.pdf
(4 pages)
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Dual D Type Master-Slave
Flip-Flop
of the standard MECL 10K family part, with 100% improvement in clock speed
and propagation delay and no increase in power–supply current.
NOTE:
3/93
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MAXIMUM RATINGS
Power Supply (V CC = 0)
Input Voltage (V CC = 0)
Output Current — Continuous
Operating Temperature Range
Storage Temperature Range — Plastic
ELECTRICAL CHARACTERISTICS (V EE = –5.2 V 5%) (See Note)
Power Supply Current
Input Current High
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
AC PARAMETERS
Propagation Delay
Rise Time
Fall Time
Set–up Time
Hold Time
Toggle Frequency
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through
a 50–ohm resistor to –2.0 volts.
Motorola, Inc. 1996
Pins 6, 11
Pin 9
Pins 7, 10
Pins 4, 5, 12, 13
Clock, CE
Set, Reset
The MC10H131 is a MECL 10H part which is a functional/pinout duplication
Characteristic
Propagation Delay, 1.0 ns Typical
Power Dissipation, 235 mW Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
— Surge
Characteristic
— Ceramic
Symbol
t hold
V OH
V OL
I inH
t set
f tog
I inL
V IH
t pd
V IL
I E
t r
t f
–1.02
–1.95
–1.17
–1.95
Min
250
0.8
0.6
0.6
0.6
0.7
0.8
0.5
—
—
—
—
—
0
–0.84
–1.63
–0.84
–1.48
Max
2–69
530
660
485
790
1.6
1.6
2.0
2.0
—
—
—
62
—
Symbol
V EE
T stg
–0.98
–1.95
–1.13
–1.95
I out
T A
250
V I
Min
0.5
0.8
0.7
0.6
0.6
0.7
0.8
—
—
—
—
—
25
–0.81
–1.63
–0.81
–1.48
Max
310
390
285
465
1.7
1.7
2.0
2.0
56
—
—
—
—
–55 to +150
–55 to +165
–8.0 to 0
0 to V EE
0 to +75
Rating
–0.92
–1.95
–1.07
–1.95
100
Min
250
0.8
0.7
0.6
0.6
0.7
0.8
50
0.3
—
—
—
—
—
75
–0.735
–0.735
–1.60
–1.45
Max
310
390
285
465
1.8
1.8
2.2
2.2
62
—
—
—
—
Unit
Vdc
Vdc
mA
C
C
C
Unit
MHz
Vdc
Vdc
Vdc
Vdc
mA
ns
ns
ns
ns
ns
A
A
REV 5
For PLCC pin assignment, see the Pin Conversion
N.D. = Not Defined
Tables on page 6–11 of the Motorola MECL Data
CE2 11
R
H
H
CE1 6
RS TRUTH TABLE
L
L
Pin assignment is for Dual–in–Line Package.
R2 13
D2 10
C C 9
S2 12
D1 7
R1 4
S1 5
V CC1
MC10H131
C E1
V EE
H
H
Q1
Q1
S
L
L
R1
S1
D1
PIN ASSIGNMENT
LOGIC DIAGRAM
Book (DL122/D).
Q n+1
N.D.
Q n
H
L
2
3
4
5
6
7
8
1
DIP
A clock H is a clock transition
from a low to a high state.
CERAMIC PACKAGE
PLASTIC PACKAGE
C = CE + C C
CLOCKED TRUTH TABLE
16
15
14
13
12
11
10
CASE 620–10
CASE 648–08
CASE 775–02
9
C
H
H
L
FN SUFFIX
L SUFFIX
P SUFFIX
PLCC
Q1
Q1
Q2
Q2
V CC1 = PIN 1
V CC2 = PIN 16
V EE = PIN 8
V CC2
Q2
Q2
R2
S2
C E2
D2
C C
D
X
H
L
2
3
14
15
Q n+1
Q n
H
L
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MC10H131P Summary of contents
Page 1
... N.D. = Not Defined A clock clock transition from a low to a high state. DIP PIN ASSIGNMENT CC1 V CC2 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). REV 5 ...
Page 2
... If the common clock used to clock the flip–flop, the Clock Enable inputs must be in the low state. MOTOROLA APPLICATION INFORMATION In this case, the enable inputs perform the function of controlling the common clock. ...
Page 3
... BSC 0.66 0.81 0.51 ––– 0.64 ––– 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 ––– 0. 7.88 8.38 1.02 ––– MOTOROLA ...
Page 4
... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...