TC90A53N TOSHIBA Semiconductor CORPORATION, TC90A53N Datasheet
TC90A53N
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TC90A53N Summary of contents
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... TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC90A53N,TC90A53F 3-LINE DIGITAL SEPARATOR IC TC90A53N / 3-line digital separator IC which separates luminance signal Y and chroma signal C from composite video signals. Toshiba’s logical comb filter realizes good separation at low cost. FEATURES · TV format : NTSC (3.58) · ...
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... BLOCK DIAGRAM TC90A53N/F 2001-02-08 2/17 ...
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... H : Coring OFF (0LSB Digital Power Supply DD3 21 V Digital GND SS3 22 BIAS DAC Bias 3 23 COUT C Output 24 BIAS DAC Bias 2 25 YOUT Y Output 26 VREF1 DAC Bias 27 V DAC Power Supply DD4 28 V DAC GND SS4 TC90A53N/F FUNCTION = Small = Medium, 2001-02-08 3/17 ...
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... GND. 8 TEST Test pin. Connect GND. Line-memory bias. Supply dividing digital power supply using resistor. Connect 0.01 mF capacitor between this pin and GND. FUNCTION ¾ ¾ ¾ ¾ I ¾ ¾ ¾ TC90A53N/F INTERFACE ¾ ¾ ¾ 2001-02-08 4/17 ...
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... VENH0 VENH1 Small (+0.25) 16 VENH0 17 VENH1 Small (+0.25 Medium (+0.75 Large (+1.25) 1-line color dot interference reducer ON / OFF L : 1-line color dot interference 18 1 LINE reducer 1-line color dot interference reducer OFF ¾ clock sc I ¾ ¾ TC90A53N/F INTERFACE ¾ ¾ 2001-02-08 5/17 ...
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... DAC bias pin. Sets lower limit of range D for DAC. Supply power by dividing 26 V REF1 power for DAC using a resistor. Recommended value : 3 DAC power supply (+5 V) DD4 28 V DAC GND SS4 INTERFACE I ¾ ¾ ¾ ¾ ¾ O ¾ ¾ ¾ ¾ ¾ 2001-02-08 6/17 TC90A53N/F ...
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... But since Vertical edge enhancement does not become OFF, be careful when using with Vertical edge enhancement. (sync to white 100%). p-p (14.3 MHz), 910 clocks / set. sc (14.3 MHz) obtained using the VCO via a buffer to the blocks and generates (typ.). TC90A53N/F (14.3 MHz). sc (typ.) and C output at p-p 2001-02-08 7/17 ...
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... CONDITION V ¾ DD ¾ ¾ T opr TC90A53N/F OPERATION Color mode Black and white mode (killer) Does not pass BPF for color signal output. Passes BPF for color signal output. Enhance amount : (+0.25) Enhance amount : (+0.25) Enhance amount : (+0.75) Enhance amount : (+1.25) 1-line color dot interference reducer circuit ...
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... VREF1 3.0 V BIAS 2 BIAS input (Note 1) BIAS IN 3 CLAMPC VFIL CKIN TC90A53N/F MIN TYP. MAX 4.75 5.0 5. 3.0 3.15 3.3 3.9 4.0 4.1 1.4 1.5 1.6 3.4 3.5 3.6 1.5 1.6 1.8 p-p 0.8 1.4 2.4 0.8 1.6 2.6 2.4 3.4 4 ...
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... V 5-stage staircase IN waveform 1.5V (Figure 15.734 kHz, 1 Vdc 2 － input input IN TC90A53N VREF1 MIN TYP. ¾ 1 -0.5 0.0 -2.0 -1 -3.0 -2 p-p 250 400 V2 ´ 400 ¾ 5 ¾ 1.0 2001-02-08 10/ MAX UNIT 1.6 V p-p 0.5 dB -0.5 dB -1.5 ¾ 700 rms 2.0 ...
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... 15.734 kHz, 1 Vdc = 2 V1:S4 1, V2: input input IN = 3.595279 MHz f4 TEST SYMBOL CIR- TEST CONDITION CUIT TC90A53N p-p MIN TYP. MAX -0.5 -0 -1.0 -0 -0 p-p 250 400 700 V2 － ´ 400 ¾ 5 ¾ 0.3 1.0 = 4.783216 MHz MIN TYP. ...
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... TEST CIRCUIT 1 TC90A53N/F 2001-02-08 12/17 ...
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... LINEARITY TEST (Figure 1) CHROMA DIFFERENTIAL GAIN (Figure 3) REFERENCE DATA (Figure 4-a) DEFINITION OF VERTICAL ENHANCE Note that output does not drop below the pedestal level (64 / 256) due to vertical outline enhance. 5-STAGE STAIRCASE SIGNAL (Figure 2) TC90A53N Vertical edge level b : enhancement level 2001-02-08 13/17 ...
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... VERTICAL ENHANCE CHARACTERISTICS (Figure 4-c) VERTICAL ENHANCE CHARACTERISTICS(ENLARGED) (Figure 5) FREQUENCY CHARACTERISTICS OF COLOR SIGNAL OUTPUT TC90A53N/F 2001-02-08 14/17 ...
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... APPLICATION CIRCUIT TC90A53N/F 2001-02-08 15/17 ...
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... PACKAGE DIMENSIONS SDIP28-P-400-1.78 Unit : mm Weight : 1.7 g (Typ.) TC90A53N/F 2001-02-08 16/17 ...
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... PACKAGE DIMENSIONS SOP28-P-450-1.27 Weight : 0.8 g (Typ.) TC90A53N/F Unit : mm 2001-02-08 17/17 ...