MC54HC161AJ Motorola, MC54HC161AJ Datasheet

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MC54HC161AJ

Manufacturer Part Number
MC54HC161AJ
Description
Presettable counter
Manufacturer
Motorola
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Presettable Counters
High–Performance Silicon–Gate CMOS
and LS163A. These devices may be used as level converters for interfacing
TTL or NMOS outputs to high speed CMOS inputs.
asynchronous and synchronous reset, respectively.
H = High Level; L = Low Level; X = Don’t Care
* = HCT163A only. HCT161A is an “Asynchronous–Reset” device.
10/95
FUNCTION TABLE
Motorola, Inc. 1995
The MC54/74HCT161A and HCT163A are identical in pinout to the LS161A
The HCT161A and HCT163A are programmable 4–bit binary counters with
Output Drive Capability: 10 LSTTL Loads
TTL, NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 200 FETs or 50 Equivalent Gates
Clock
Enables
Count
Preset
Inputs
Data
Reset*
Enable P
Enable T
Clock
H
H
H
H
L
Reset
Reset
P 0
P 1
P 2
P 3
Load
3
4
5
6
2
1
1
9
7
10
Inputs
Load
LOGIC DIAGRAM
H
H
H
X
L
Enable P
X
X
H
X
L
Enable T
Pin 16 = VCC
Pin 8 = GND
14
13
12
15
11
X
X
H
X
L
Q 0
Q 1
Q 2
Q 3
Ripple
Carry Out
Reset
Load Preset Data
Count
No Count
No Count
BCD or Binary
Outputs
Output
Output
Q
Q
1
MC54/74HCT161A
MC54/74HCT163A
HCT161A
HCT163A
Reset Clock
V CC
Device
16
REV 2
1
16
16
Pinout: 16–Lead Package (Top View)
16
RCO*
1
1
15
2
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
1
Q 0
14
P 0
3
* RCO = Ripple Carry Out
Count Mode
Binary
Binary
Q 1
13
P 1
4
CERAMIC PACKAGE
PLASTIC PACKAGE
SOIC PACKAGE
CASE 751B–05
Q 2
12
P 2
5
CASE 620–10
CASE 648–08
N SUFFIX
D SUFFIX
J SUFFIX
Ceramic
Plastic
SOIC
Q 3
P 3 Enable
11
6
Asynchronous
Synchronous
Reset Mode
Enable
10
T
7
P
Load
GND
9
8

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MC54HC161AJ Summary of contents

Page 1

... Inputs Clock Reset* Load Enable High Level Low Level Don’t Care * = HCT163A only. HCT161A is an “Asynchronous–Reset” device. 10/95 Motorola, Inc. 1995 MC54/74HCT161A MC54/74HCT163A BCD or Binary Device 12 Outputs Q 2 HCT161A HCT163A 15 Ripple Carry Out Pinout: 16–Lead Package (Top View) ...

Page 2

... Additional Quiescent Supply Additional Quiescent Supply Current Current NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 3

... Ripple Carry Out of each stage is tied to the Clock of the next stage (nonsynchronously clocked), the f max in the table above is applicable. See Applications information in this data sheet. NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D). ...

Page 4

... Ripple Carry Out remains high only during the maximum count state. The logic equation for this output is: Ripple Carry Out = Enable MOTOROLA FUNCTION DESCRIPTION CONTROL FUNCTIONS Resetting A low level on the Reset pin (pin 1) resets the internal flip– ...

Page 5

... GND TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 7. Test Circuit 3.0V 1.3V GND 1.3V t rec 3.0V 1.3V GND Figure 2. 3.0V 1.3V GND t h 3.0V 1.3V GND Valid 3.0V 1.3V GND 3.0V 1.3V GND Figure 6. MOTOROLA ...

Page 6

... MC54/74HCT161A MC54/74HCT163A Enable P 10 Enable T 1 Reset 9 Load 2 Clock Figure 8. 4–Bit Binary Counter with Asynchronous Reset (MC54/74HCT161A) MOTOROLA Load Load Load Load Load Load Load Load P3 The flip–flops shown in the circuit diagrams are Toggle– Enable flip–flops. A Toggle–Enable flip–flop is a combina- R tion flip– ...

Page 7

... Reset (HCT163A) Load P0 P1 Preset Data Inputs P2 P3 Clock (HCT161A) Clock (HCT163A) Enable P Count Enables Enable Outputs Q2 Q3 Ripple Carry Out Reset High–Speed CMOS Logic Data DL129 — Rev 6 MC54/74HCT161A MC54/74HCT163A (Asynchronous) (Synchronous Count Load Figure 9. Timing Diagram 7 Inhibit MOTOROLA ...

Page 8

... MC54/74HCT161A MC54/74HCT163A Enable P 10 Enable T 1 Reset 9 Load 2 Clock Figure 10. 4–Bit Binary Counter with Synchronous Reset (MC54/74HCT163A) MOTOROLA Load Load Load Load Load Load Load Load P3 The flip–flops shown in the circuit diagrams are Toggle– Enable flip–flops. A Toggle–Enable flip–flop is a combina- R tion flip– ...

Page 9

... Inputs Load Enable P Ripple Enable T Carry Out Clock Reset Outputs Figure 12. Nibble Ripple Counter 9 Inputs Load Enable P Ripple To More Enable T Carry Significant Out Stages Clock Reset Outputs Inputs Load Enable P Ripple To More Enable T Carry Significant Out Stages Clock Reset Outputs MOTOROLA ...

Page 10

... Optional Buffer Q1 for Noise Rejection Q2 Q3 Reset Figure 13. Modulo–5 Counter The HCT163A facilitates designing counters of any modulus with minimal external logic. The output is glitch– free due to the synchronous Reset. MOTOROLA HCT163A Other Inputs Output Reset Figure 14. Modulo–11 Counter 10 Q0 ...

Page 11

... B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 1.27 BSC 0.050 BSC G J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 0.229 0.244 P 5.80 6.20 R 0.25 0.50 0.010 0.019 MOTOROLA ...

Page 12

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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