N80C54 Intel Corporation, N80C54 Datasheet
N80C54
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N80C54 Summary of contents
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... Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1996 8XC52 54 58 Commercial Express ...
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Table 1 Proliferations Options 1 Standard -1 -2 80C32 80C52 87C52 80C54 87C54 80C58 87C58 ...
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PROCESS INFORMATION This device is manufactured on P629 0 a CHMOS III-E process Additional process and reliability infor- mation is available in Intel’s Components Quality and Reliability Handbook Order No 210997 DIP Do not connect reserved pins PACKAGES Part Prefix ...
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PIN DESCRIPTIONS V Supply voltage CC V Circuit ground SS V Secondary ground (not on DIP) Provided to SS1 reduce ground bounce and improve power supply by-passing NOTE This pin is not a substitute for the V ...
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If desired ALE operation can be disabled by setting bit 0 of SFR location 8EH With this bit set the pin is weakly pulled high However the ALE disable fea- ture will be suspended during a MOVX or MOVC in- ...
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Table 2 Status of the External Pins during Idle and Power Down Program Mode Memory Idle Internal Idle External Power Down Internal Power Down External POWER DOWN MODE To save even more power a Power Down mode ...
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EXPRESS The Intel EXPRESS system offers enhancements to the operational specifications of the MCS 51 family of microcontrollers These EXPRESS products are designed to meet the needs of those applications whose operating requirements exceed commercial standards The EXPRESS program ...
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ABSOLUTE MAXIMUM RATINGS Ambient Temperature Under Bias b Storage Temperature b Voltage Pin Voltage on Any Other Pin Per I O Pin OL Power Dissipation (based ...
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DC CHARACTERISTICS (Over Operating Conditions) (Continued) All parameter values apply to all devices unless otherwise indicated Symbol Parameter V Output High Voltage OH1 (Port 0 in External Bus Mode) I Logical 0 Input Current IL (Ports 1 2 and 3) ...
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NOTE I Max at 33 MHz 10 Max at 24 MHz and below Figure 5 8XC52 All other pins disconnected TCLCH TCHCL ...
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All other pins disconnected TCLCH TCHCL Figure 7 I Test Condition Idle Mode CC Figure 9 Clock Signal Waveform for I 272336 –9 All other pins disconnected Figure 8 I Test Condition Power Down Mode CC ...
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EXPLANATION OF THE AC SYMBOLS Each timing symbol has 5 characters The first char- acter is always a ‘T’ (stands for time) The other characters depending on their positions stand for the name of a signal or ...
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EXTERNAL MEMORY CHARACTERISTICS All parameter values apply to all devices unless otherwise indicated Symbol Parameter 12 MHz Min Max Min Max Min Max TLLPL ALE Low to PSEN Low 8XC5X -24 53 8XC5X-33 TPLPH PSEN Pulse 205 Width TPLIV PSEN ...
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EXTERNAL MEMORY CHARACTERISTICS All parameter values apply to all devices unless otherwise indicated Symbol Parameter 12 MHz Min Max Min Max Min Max TRLDV RD Low to Valid Data In 8XC5X 8XC5X-24 8XC5X-33 TRHDX Data Hold After ...
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EXTERNAL MEMORY CHARACTERISTICS All parameter values apply to all devices unless otherwise indicated Symbol Parameter 12 MHz Min TQVWX Data Valid to WR Transition 8XC5X 33 8XC5X-24 33 TWHQX Data Hold After WR 8XC5X 33 8XC5X-24 8XC5X-33 TQVWH Data Valid ...
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EXTERNAL PROGRAM MEMORY READ CYCLE EXTERNAL DATA MEMORY READ CYCLE EXTERNAL DATA MEMORY WRITE CYCLE 16 272336 –25 272336 –26 272336 –27 ...
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SERIAL PORT TIMING - SHIFT REGISTER MODE Test Conditions Over Operating Conditions Load Capacitance Symbol Parameter 12 MHz Min Max TXLXL Serial Port 1 Clock Cycle Time TQVXH Output Data 700 Setup to Clock Rising Edge TXHQX Output Data Hold ...
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EXTERNAL CLOCK DRIVE Symbol Parameter 1 TCLCL Oscillator Frequency 8XC5X 8XC5X-1 8XC5X-2 8XC5X-24 8XC5X-33 TCHCX High Time 8XC5X-24 33 TCLCX Low Time 8XC5X-24 33 TCLCH Rise Time 8XC5X-24 8XC5X-33 TCHCL Fall Time 8XC5X-24 8XC5X-33 EXTERNAL CLOCK DRIVE ...
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PROGRAMMING THE EPROM The part must be running with a 4 MHz to 6 MHz oscillator The address of an EPROM location to be programmed is applied to address lines while the code byte to be programmed in that location ...
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See Table 4 for proper input on these pins PROGRAMMING ALGORITHM Refer to Table 4 and Figures 10 and 11 for address data and control signals set up To program the 87C5X the following sequence must be ...
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ROM and EPROM Lock System The program lock system when programmed pro- tects the onboard program against software piracy The 80C5X has a one-level program lock system and a 64-byte encryption table See line 2 of Table 5 If program ...
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Table 5 Program Lock Bits and the Features Program Lock Bits LB1 LB2 LB3 Program Lock features enabled (Code verify will still be encrypted by the Encryption Array if programmed ) 2 ...
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EPROM PROGRAMMING AND VERIFICATION WAVEFORMS 5 pulses for the EPROM array 25 pulses for the encryption table and lock bits Thermal Impedance All thermal impedance data is approximate for static air conditions power dissipation Values will change ...