MC34115P Freescale Semiconductor, Inc, MC34115P Datasheet

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MC34115P

Manufacturer Part Number
MC34115P
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Continuously Variable Slope
Delta Modulator/Demodulator
MC34115 CVSD is designed for speech synthesis and commercial telephone
applications. A single IC provides both encoding and decoding functions.
V CC /2 Output
Digital Output
MOTOROLA ANALOG IC DEVICE DATA
Analog Input
Providing a simplified approach to digital speech encoding/decoding, the
Encode and Decode Functions Selectable with a Digital Input
Utilization of Compatible I 2 L – Linear Bipolar Technology
CMOS Compatible Digital Output
Digital Input Threshold Selectable (V CC /2 Reference Provided On–Chip)
3–Bit Algorithm
Data Input
Threshold
Feedback
Analog
Digital
Digital
13
12
10
1
2
9
I Ref
V th
Encode/Decode
This device contains 144 active transistors.
+
+
I O
V CC /2
Ref
Analog
Output
15
7
CVSD Block Diagram
Q Q Q Q Q Q
Integrator
Shift Register
Amplifier
Input
Ref
(+)
+
3–Bit
5
Clock
14
6
Filter
Input
(–)
I Int
Polarity
Switch
Slope
Logic
V CC
V EE
V/I
Converter
16
8
11
3
4
I GC
Coincidence
Output
Syllabic Filter
Gain Control
MC34115P
MC34115DW
Analog Feedback (+)
Motorola, Inc. 1996
MODULATOR/DEMODULATOR
Device
CONTINUOUSLY VARIABLE
Analog Input (–)
Analog Output
Filter Input (–)
Syllabic Filter
Gain Control
Ref Input (+)
ORDERING INFORMATION
MC34115
V EE
SLOPE DELTA
PIN CONNECTIONS
Temperature Range
SEMICONDUCTOR
TECHNICAL DATA
Order this document by MC34115/D
PLASTIC PACKAGE
PLASTIC PACKAGE
T A = 0 to +70 C
16
16
1
2
3
4
5
6
7
8
Operating
DW SUFFIX
CASE 751G
1
CASE 648
P SUFFIX
(SO–16L)
(Top View)
1
16
15
14
13
12
10
11
9
V CC
Clock
Digital Data Input (–)
Coincidence Output
Digital Output
Encode/Decode
Digital Threshold
V CC /2 Output
Plastic DIP
Package
SO–16L
Rev 1
1

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MC34115P Summary of contents

Page 1

... Coincidence Logic Output V/I Analog Output Converter 3 Slope Syllabic Filter 4 Polarity Gain Control Switch Device MC34115P MC34115DW Motorola, Inc. 1996 Order this document by MC34115/D MC34115 SLOPE DELTA SEMICONDUCTOR TECHNICAL DATA SUFFIX PLASTIC PACKAGE CASE 648 SUFFIX PLASTIC PACKAGE CASE 751G (SO–16L) ...

Page 2

MAXIMUM RATINGS (All voltages referenced unless otherwise noted.) (Note 2) Rating Power Supply Voltage Differential Analog Input Voltage Digital Threshold Voltage Logic Input Voltage (Clock, Digital Data, Encode/Decode) Coincidence Output Voltage ...

Page 3

ELECTRICAL CHARACTERISTICS (continued) Characteristic Propagation Delay Times (Note 1) Clock Trigger to Digital Output Gnd Clock Trigger to Coincidence Output Gnd 4.0 kΩ ...

Page 4

Pin 1 – Analog Input This is the analog comparator inverting input where the voice signal is applied. It may coupled depending on the application. If the voice signal level shifted to the ...

Page 5

Pin 13 – Digital Data Input In a decode application, the digital data stream is applied to Pin 13 encoder it may be unused or may be used to transmit a signaling message under the control of Pin ...

Page 6

Figure 3. Input Bias Currents, Analog Comparator Offset Voltage and Current V IO(Comparator 1.0 k – 100 mV 3 0.1 CVSD 4 MC34115 100 k 0 0.05 ...

Page 7

TYPICAL PERFORMANCE CURVES Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Figure 7. Typical I Int versus I GC (Mean 2 σ) Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç Ç ...

Page 8

Figure 13. Block Diagram of the CVSD Decoder Clock Digital In Sampler Audio Out Integrator 8 MC34115 Figure 12. CVSD Waveforms Integrator Output (Reconstructed Audio) Input Audio Digital Output Level Detect Algorithm Slope Polarity Switch MOTOROLA ANALOG IC DEVICE DATA ...

Page 9

MOTOROLA ANALOG IC DEVICE DATA MC34115 + – 9 ...

Page 10

The continuously variable slope delta modulator (CVSD simple alternative to more complex conventional conversion techniques in systems requiring digital communication of analog signals. The human voice is analog, but digital transmission of any signal over great distance is ...

Page 11

MC34115, Single–Pole Companding and Single Integration) 5.0 Push To Talk (Norm Key Open Analog + Input 4.0 µ 600 600 0.1 1 Ref Input 7 Analog ...

Page 12

Figure 16. Signal–to–Noise Performance with Single Integration, Single–Pole and Companding Bits (Typical) 15 Clock Rate = 16 kHz 10 Test Tone = 1.0 kHz Sine Wave Noise Weighting C Message 5.0 –40 –30 –20 –10 INPUT LEVEL ...

Page 13

Integration Filter Design The circuit in Figure 15 uses a single–pole integration network formed with a 0.1 µF capacitor and a 10 kΩ resistor possible to improve the performance of the circuit in Figure 15 by 1.0 or ...

Page 14

Figure 19. High Performance Elliptic Filter for CVSD Output C1 1000 R1 R2 87.6 k 175 157 247 k Figure 20. Full Duplex/16 k Bit CVSD Voice Codec Analog ...

Page 15

0.25 (0.010) –A– –B– 16X 0.010 (0.25 14X K MOTOROLA ANALOG IC DEVICE DATA ...

Page 16

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...

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