MT47H32M16HR-25AT:FTR Micron Technology Inc, MT47H32M16HR-25AT:FTR Datasheet - Page 110

• Manufacturer Part Number: MT47H32M16HR-25AT:FTR
• Manufacturer: Micron Technology Inc

Specifications of MT47H32M16HR-25AT:FTR

• Lead Free Status / Rohs Status: Compliant

Figure 63: Bank Write – with Auto Precharge
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512MbDDR2.pdf - Rev. R 12/10 EN
DQS, DQS#
Command
Bank select
Address
DQ 6
CK#
CKE
A10
DM
CK
NOP 1
T0
Notes:
Bank x
ACT
RA
RA
T1
t CK
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 and AL = 0 in the case shown.
3. Enable auto precharge.
4. WR is programmed via MR9–MR11 and is calculated by dividing
5. Subsequent rising DQS signals must align to the clock within
6. DI n = data-in from column n; subsequent elements are applied in the programmed order.
7.
8.
these times.
rounding up to the next integer value.
t
t
DSH is applicable during
DSS is applicable during
t RCD
NOP 1
T2
t CH
t CL
WRITE 2
Bank x
Col n
3
T3
WL ± t DQSS (NOM)
WL = 2
NOP 1
t
110
T4
t
DQSS (MAX) and is referenced from CK T6 or T7.
DQSS (MIN) and is referenced from CK T5 or T6.
t WPRE
NOP 1
T5
DI
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n
t RAS
512Mb: x4, x8, x16 DDR2 SDRAM
T5n
t DQSL t DQSH t WPST
NOP 1
5
T6
T6n
Transitioning Data
NOP 1
T7
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t
DQSS.
t
WR (in ns) by
NOP 1
WR 4
T8
Don’t Care
NOP 1
t
T9
CK and
WRITE
t RP