MAX9723DETE+ Maxim Integrated Products, MAX9723DETE+ Datasheet - Page 12

• Manufacturer Part Number: MAX9723DETE+
• Description: IC AMP AUDIO .06W STER AB 16TQFN
• Manufacturer: Maxim Integrated Products
• Series: DirectDrive™r
• Type: Class ABr

Specifications of MAX9723DETE+

• Output Type: Headphones, 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 60mW x 2 @ 16 Ohm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Features: Bass Boost, Depop, I²C, Mute, Short-Circuit and Thermal Protection, Shutdown, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 16-TQFN Exposed Pad
• Amplifier Class: AB
• No. Of Channels: 2
• Output Power: 60mW
• Supply Voltage Range: 1.8V To 3.6V
• Load Impedance: 16ohm
• Operating Temperature Range: -40°C To +85°C
• Amplifier Case Style: TQFN
• Rohs Compliant: Yes
• For Use With: MAX9723DEVKIT+ - EVALUATION KIT FOR MAX9723
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

from the master. The master, typically a microcontroller,
generates SCL and initiates data transfer on the bus.
A master device communicates to the MAX9723 by
transmitting the proper address followed by the data
word. Each transmit sequence is framed by a START (S)
or REPEATED START (Sr) condition and a STOP (P) con-
dition. Each word transmitted over the bus is 8 bits long
and is always followed by an acknowledge clock pulse.
The MAX9723 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9723 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL if there are multiple mas-
ters on the bus, or if the master in a single-master sys-
tem has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. Series resistors
protect the digital inputs of the MAX9723 from high-
voltage spikes on the bus lines, and minimize crosstalk
and undershoot of the bus signals.
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I
SDA and SCL idle high when the bus is not in use. A
master device initiates communication by issuing a
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
Figure 3. 2-Wire Serial-Interface Timing Diagram
12
2
C bus is not busy.
SDA
SCL
______________________________________________________________________________________
t
HD, STA
CONDITION
START
t
LOW
t
R
Start and Stop Conditions
t
t
SU, DAT
HIGH
t
F
t
HD, DAT
Bit Transfer
t
SU, STA
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
4). A START condition from the master signals the begin-
ning of transmission to the MAX9723. The master termi-
nates transmission and frees the bus by issuing a STOP
condition. The bus remains active if a REPEATED START
condition is generated instead of a STOP condition.
The MAX9723 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
The MAX9723 is available with one of two preset slave
addresses (see Table 1). The address is defined as the
seven most significant bits (MSBs) followed by the
Read/Write (R/W) bit. The address is the first byte of
information sent to the MAX9723 after the START condi-
tion. The MAX9723 is a slave device only capable of
being written to. The sent R/W bit must always be a
zero when configuring the MAX9723.
The MAX9723 acknowledges the receipt of its address
even if R/W is set to 1. However, the MAX9723 will not
drive SDA. Addressing the MAX9723 with R/W set to 1
causes the master to receive all 1’s regardless of the
contents of the command register.
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9723 uses to handshake receipt of each byte of
CONDITION
REPEATED
START
t
HD, STA
t
SP
t
SU, STO
2
Early STOP Conditions
C
CONDITION
STOP
Slave Address
Acknowledge
t
BUF
CONDITION
START