LM4910MM/NOPB National Semiconductor, LM4910MM/NOPB Datasheet - Page 10

• Manufacturer Part Number: LM4910MM/NOPB
• Description: IC AMP AUDIO PWR .035W AB 8MSOP
• Manufacturer: National Semiconductor
• Series: Boomer®r
• Type: Class ABr

Specifications of LM4910MM/NOPB

• Output Type: Headphones, 2-Channel (Stereo)
• Max Output Power X Channels @ Load: 35mW x 2 @ 32 Ohm
• Voltage - Supply: 2.2 V ~ 5.5 V
• Features: Depop, Shutdown, Thermal Protection
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM4910MM; LM4910MMTR

www.national.com
Application Information
ELIMINATING OUTPUT COUPLING CAPACITORS
Typical single-supply audio amplifiers that drive single-ended
(SE) headphones use a coupling capacitor on each SE out-
put. This output coupling capacitor blocks the half-supply
voltage to which the output amplifiers are typically biased and
couples the audio signal to the headphones. The signal return
to circuit ground is through the headphone jack's sleeve.
The LM4910 eliminates these output coupling capacitors.
Amp3 is internally configured to apply a bandgap referenced
voltage (V
This voltage matches the quiescent voltage present on the
Amp1 and Amp2 outputs that drive the headphones. The
headphones operate in a manner similar to a bridge-tied-load
(BTL). The same DC voltage is applied to both headphone
speaker terminals. This results in no net DC current flow
through the speaker. AC current flows through a headphone
speaker as an audio signal's output amplitude increases on
the speaker's terminal.
The headphone jack's sleeve is not connected to circuit
ground. Using the headphone output jack as a line-level out-
put will place the LM4910's bandgap referenced voltage on a
plug's sleeve connection. This presents no difficulty when the
external equipment uses capacitively coupled inputs. For the
very small minority of equipment that is DC-coupled, the
LM4910 monitors the current supplied by the amplifier that
drives the headphone jack's sleeve. If this current exceeds
500mA
and the external equipment.
ELIMINATING THE HALF-SUPPLY BYPASS CAPACITOR
Typical single-supply audio amplifers are normally biased to
1/2V
signal. This is usually achieved with a simple resistor divider
network from V
voltage to the amplifier. However, this scheme requires the
use of a half-supply bypass capacitor to improve the bias
voltage's stability and the amplifier's PSRR performance.
The LM4910 utilizes an internally generated, buffered
bandgap reference voltage as the amplifier's bias voltage.
This bandgap reference voltage is not a direct function of
V
power supply line. This allows for the LM4910 to have a stable
bias voltage and excellent PSRR performance even without
a half-supply bypass capacitor.
OUTPUT TRANSIENT ('CLICK AND POPS') ELIMINATED
The LM4910 contains advanced circuitry that virtually elimi-
nates output transients ('clicks and pops'). This circuitry pre-
vents all traces of transients when the supply voltage is first
applied or when the part resumes operation after coming out
of shutdown mode. The LM4910 remains in a muted condition
until there is sufficient input signal magnitude (>5mV
to mask any remaining transient that may occur. Figure 2
shows the LM4910's lack of transients in the differential signal
(Trace B) across a 320 load. The LM4910's active-low SHUT-
DOWN pin is driven by the logic signal shown in Trace A.
Trace C is the V
signal.
To ensure optimal click and pop performance under low gain
configurations (less than 0dB), it is critical to minimize the RC
combination of the feedback resistor R
pacitance at the amplifier inputs. A more reliable way to lower
gain or reduce power delivered to the load is to place a current
limiting resistor in series with the load as explained in the
DD
and therefore is less susceptible to noise or ripple on the
DD
PK
in order to maximize the output swing of the audio
, the amplifier is shutdown, protecting the LM4910
REF
= 1.58V) to a stereo headphone jack's sleeve.
O1
DD
output signal and Trace D is the V
to ground that provides the proper bias
F
and stray input ca-
O3
RMS
output
, typ)
10
Minimizing Output Noise / Reducing Output Power sec-
tion.
AMPLIFIER CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4910 has three operational am-
plifiers internally. Two of the amplifier's have externally con-
figurable gain while the other amplifier is internally fixed at the
bias point acting as a unity-gain buffer. The closed-loop gain
of the two configurable amplifiers is set by selecting the ratio
of R
is
By driving the loads through outputs V
acting as a buffered bias voltage the LM4910 does not require
output coupling capacitors. The typical single-ended amplifier
configuration where one side of the load is connected to
ground requires large, expensive output coupling capacitors.
A configuration such as the one used in the LM4910 has a
major advantage over single supply, single-ended amplifiers.
Since the outputs V
1.58V, no net DC voltage exists across each load. This elim-
inates the need for output coupling capacitors that are re-
quired in a single-supply, single-ended amplifier configura-
tion. Without output coupling capacitors in a typical single-
supply, single-ended amplifier, the bias voltage is placed
across the load resulting in both increased internal IC power
dissipation and possible loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when designing a suc-
cessful amplifier. A direct consequence of the increased pow-
er delivered to the load by a bridge amplifier is an increase in
internal power dissipation. The maximum power dissipation
for a given application can be derived from the power dissi-
pation graphs or from Equation 1.
It is critical that the maximum junction temperature T
150°C is not exceeded. Since the typical application is for
headphone operation (32Ω impedance) using a 3.3V supply
the maximum power dissipation is only 138mW. Therefore,
power dissipation is not a major concern.
f
to R
i
. Consequently, the gain for each channel of the IC
P
DMAX
O1
= 4(V
, V
A
FIGURE 2.
O2
V
, and V
DD
= -(R
)
2
/ (π
f
/R
O3
i
)
2
R
are all biased at V
L
)
O1
and V
20030592
O2
with V
JMAX
REF
(1)
O3
of
=