A4973SLBTR-T Allegro Microsystems Inc, A4973SLBTR-T Datasheet

A4973SLBTR-T

Manufacturer Part Number

A4973SLBTR-T

Description

Manufacturer

Allegro Microsystems Inc

Datasheets

1.A4973SB-T.pdf (11 pages)

2.A4973SLBTR-T.pdf (11 pages)

Specifications of A4973SLBTR-T

Lead Free Status / Rohs Status

Supplier Unconfirmed

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Package B, 16-pin DIP

with exposed tabs

Features and Benefits

▪ ±1.5 A continuous output current

▪ 50 V output voltage rating

▪ 3 V to 5.5 V logic supply voltage

▪ Internal PWM current control

▪ Fast and slow current-decay modes

▪ Sleep (low current consumption) mode

▪ Internal transient-suppression diodes

▪ Internal thermal shutdown circuitry

▪ Crossover current and UVLO protection

Packages:

4973DS

GROUND

SUPPLY

ENABLE

PHASE

BRAKE

LOGIC

MODE

Not to scale

Preliminary Datasheet

Package LB, 16-pin SOIC

with internally fused pins

SLEEP &

STANDBY MODES

Functional Block Diagram

& TSD

UVLO

BLANKING

Subject to Change Without Notice March 8, 2011

Full-Bridge PWM Motor Driver

PWM LATCH

R T

Description

Designed for bidirectional pulse width modulated (PWM)

current control of inductive loads, the A4973 is capable of

continuous output currents to ±1.5 A and operating voltages

to 50 V. Internal fixed off-time PWM current-control circuitry

can be used to regulate the maximum load current to a desired

value. The peak load current limit is set by the user’s selection

of an input reference voltage and external sensing resistor. The

fixed off-time pulse duration is set by a user- selected external

RC timing network. Internal circuit protection includes thermal

shutdown with hysteresis, transient-suppression diodes, and

crossover current protection. Special power-up sequencing is

not required.

With the ENABLE input held low, the PHASE input controls

load current polarity by selecting the appropriate source and

sink driver pair. The MODE input determines whether the

PWM current-control circuitry operates in a slow current-decay

mode (only the selected source driver switching) or in a fast

current-decay mode (selected source and sink switching). A

user-selectable blanking window prevents false triggering of

the PWM current-control circuitry. With the ENABLE input

held high, all output drivers are disabled. A sleep mode is

provided to reduce power consumption.

Continued on the next page…

C T

+ –

V TH

–

REF

SENSE

GROUND

R S

A4973

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