ISD5008Z Nuvoton Technology Corporation of America, ISD5008Z Datasheet
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ISD5008Z
Specifications of ISD5008Z
Related parts for ISD5008Z
ISD5008Z Summary of contents
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ISD5008 SINGLE-CHIP, VOICE RECORD / PLAYBACK DEVICE 4-, 5-, 6- AND 8-SECOND DURATION Publication Release Date: May, 2005 Revision 0.1 ...
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Single-Chip Voice Record/Playback Device ISD5008 PRODUCT SUMMARY The ISD5008 ChipCorder product is a fully-inte- grated, single-chip solution which provides seam- less integration of enhanced voice record and playback features for digital cellular phones (GSM, CDMA, TDMA, PDC, and PHS), automotive ...
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Duration/sample rate selection is accomplished via software, allowing customers to optimize qual- ity and duration for various features within the same end product. The ISD5008 device is designed for use in a micro- processor- or microcontroller-based system. Ad- dress, control, ...
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DETAILED DESCRIPTION ................................................. .................... 1 1.1 Speech/Sound Quality ...................................... .................... 1 1.2 Duration ............................................................ .................... 1 1.3 Flash Storage .................................................... .................... 1 1.4 Microcontroller Interface ....................................................... 1 1.5 Programming .................................................... .................... 1 2 PIN DESCRIPTIONS ........................................................ .................... 2 2.1 ...
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DETAILED DESCRIPTION 1.1 SPEECH/SOUND QUALITY The ISD5008 ChipCorder product can be config- ured via software to operate at 4.0, 5.3, 6.4, and 8.0 kHz sampling frequencies, allowing the user a choice of speech quality options. Increasing the duration decreases ...
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ISD5008 Product 2 PIN DESCRIPTIONS 2.1 DIGITAL I/O PINS SCLK (Serial Clock) The SCLK is the clock input to the ISD5008. Gener- ated by the master microcontroller, the SCLK syn- chronizes data transfers in and out of the device through ...
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Table 2: External Clock Input Table Duration Sample Rate Required Clock (Minutes) (kHz) 4 8.0 5 6.4 6 5.3 8 4.0 Table 3: Internal Clock Rate/Filter Edge Sample Rate Filter Pass Band FLD1 FLD0 (kHz ...
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ISD5008 Product ANA IN (Analog Input) The ANA IN pin is the analog input from the tele- phone chip set. It can be switched (by the SPI bus) to the speaker output, the array input or to various other paths. ...
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AUX IN (Auxiliary Input) The AUX additional audio input to the ISD5008, such as from the microphone circuit in a mobile phone “car kit.” This input has a nominal 700 mVp-p level at its minimum gain setting ...
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ISD5008 Product ANAOUT+/– (Analog Outputs) This differential output is designed the mi- crophone input of the telephone chip set de- signed to drive a minimum of 5 kΩ between the “+” and “–” pins to ...
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Figure 4: ISD5008 Series TSOP and PDIP/SOIC Pinouts ISD5008 28-PIN TSOP 3 INTERNAL FUNCTIONAL BLOCKS Microphone (300 mVp-p Max VLS1 VLS0 VOL2 VOL1 VOL0 S1S1 S1S0 ISD Figure 5: Microphone Amplifier 6 dB ...
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ISD5008 Product Car Kit Chip Set ANA AIG1 AIG0 AIPD AXG1 AXG0 AXPD INS0 8 Figure 6: AUX IN and ANA IN AUX IN AUX IN AMP 2 (AXG1, AXG0) AXG1 0 ...
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INPUT SOURCE MUX AGC AMP AUX IN AMP INSO Source 0 AGC AMP 1 AUX IN AMP ANA IN AMP ARRAY FILTO AIG1 AIG0 AIPD AXG1 AXG0 AXPD ...
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ISD5008 Product Figure 8: ISD5008 Core (Right Half) FILTER MUX SUM1 ARRAY FLS0 Source 0 SUM1 1 1 ARRAY (FLS0) FLPD 0 Power Up 1 Power Down ANA IN AMP XCLK FLD1 FLD0 SAMPLE RATE FILTER PASS BAND 0 0 ...
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VOL ANA IN AMP MUX SUM2 SUM1 INP 2 (VLS1,VLS0) VLS1 VLS0 SOURCE 0 0 ANA IN AMP 0 1 SUM2 1 0 SUM1 1 1 INP AIG1 AIG0 AIPD AXG1 AXG0 AXPD 15 14 ...
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ISD5008 Product VOL ANA IN AMP FILTO SUM2 AIG1 AIG0 AIPD AXG1 AXG0 AXPD ANA OUT MUX *FTHRU *INP *VOL *FILTO *SUM1 *SUM2 3 (AOS2,AOS1,AOS0) *DIFFERENTIAL PATH AIG1 ...
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SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION The ISD5008 product operates from an SPI serial in- terface. The SPI interface operates with the following protocol. The data transfer protocol assumes that the mi- crocontroller’s SPI shift registers are clocked on the ...
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ISD5008 Product Opcode <8 bits> Instruction Address <16 bits> POWERUP 0110 0000 (2) LOADCFG0 01X0 0010 <D15–D0> LOADCFG1 01X0 0100 <D15–D0> SETPLAY 1110 0000 <A15–A0> PLAY 1111 0000 SETREC 1010 0000 <A15–A0> REC 1011 0000 MC 1111 1000 STOP 0111 ...
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SPI PORT The following diagram describes the SPI port and the control bits associated with it. NOTE: Bytes 1 and 2 of the MOSI input may be address bits or configuration bits, depending on the selected mode in byte ...
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ISD5008 Product Table 8: Configuration Register 0 D15 D14 D13 D12 D11 D10 AIG1 AIG0 AIPD AXG1 AXG0 AXPD INS0 AOS2 AOS1 AOS0 AOPD OPS1 OPS0 OPA1 OPA0 VLPD NOTE: See details on following pages. Table 9: Configuration Register 1 ...
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Detail of Configuration Register 0 Volume Control Bit 0 Power Bit (VLPD) SPEAKER and AUX Bits 2,1 OUT Control Bits (OPA1, OPA0) OUTPUT MUX Control Bits 4,3 Bits (OPS1, OPS0) ANA OUT Power Bit Bit 5 (AOPD) ANA OUT MUX ...
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ISD5008 Product Detail of Configuration Register 1 AGC Power Control Bit 0 Bit (AGPD) LOW PASS FILTER Bit 1 Power Control Bit (FLPD) SAMPLE RATE and Bits 3,2 LOW PASS FILTER (FLD1, FLD0) Control Bits FILTER MUX Control Bit 4 ...
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Figure 13: Configuration Register Programming Sequence Load Configuration Register 0 Load Configuration Register 0 Control Word (C7-C0) Control Word (C7-C0) Figure 14: SPI Interface Simplified Block Diagram 1. See Table 8 for bit details. ISD Configuration Register 0 Configuration Register ...
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ISD5008 Product Figure 15: Typical Digital Cellular Phone Integration RF IF Interface Section 20 ISD5008 MIC IN+ ANA OUT+ MIC IN– ANA OUT- SP OUT+ ANA IN – SP OUT DSP Voice Band Codec AUX OUT SPI SPI Microcontroller Keypad ...
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OPERATIONAL MODES DESCRIPTION The ISD5008 can operate in many different modes. It’s flexibility allows the user to configure the chip such that almost any input can mixed with any other input and then be directed to any output. The ...
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ISD5008 Product To select this mode, the following control bits must be configured in the ISD5008 configuration regis- ters. To set up the transmit path: 1. Select the FTHRU path through the ANA OUT MUX— Bits AOS0, AOS1 and AOS2 ...
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D9 and D10 of CFG1. They control the SUM1 MUX. (f). Bits VOL0, VOL1 and VOL2 are bits D11, D12 and D13 of CFG1. They control the setting of the Volume Control. (g). Bits VLS0 and VLS1 are bits D14 ...
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ISD5008 Product 5.3 MEMO RECORD The Memo Record mode sets the chip up to record from the local microphone into the chip’s Multilevel Storage Array. A connected cellular telephone or cordless phone chip set may remain powered down and is ...
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These are bits D2 and D3 of CFG1. To enable the 8.0 kHz sample rate, D2 and D3 must be set to ZERO. 4. Select the LOW PASS FILTER input (only) to the S2 SUMMING amplifier —Bits S2M0 ...
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ISD5008 Product Table 10: Absolute Maximum Ratings (Packaged Parts) Condition Junction temperature Storage temperature range Voltage applied to any pin Voltage applied to MOSI, SCLK, INT, RAC and SS pins (Input current limited to ±20mA) Lead temperature (soldering – 10 ...
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Symbol Parameters V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V RAC, INT Output Low OL1 Voltage V Output High Voltage Current (Operating — Playback — Record — ...
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ISD5008 Product Symbol Characteristic F Sampling Frequency S F Filter Pass Band CF 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) T Record Duration REC 8.0 kHz (sample rate) 6.4 kHz (sample ...
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Symbol Characteristic T RAC Clock Period in RACM Message Cueing Mode 8.0 kHz (sample rate) 6.4 kHz (sample rate) 5.3 kHz (sample rate) 4.0 kHz (sample rate) T RAC Clock Low Time in RACML Message Cueing Mode 8.0 kHz (sample ...
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ISD5008 Product Symbol Characteristic A Gain from ANA IN to ANA IN (AUX OUT) AUX OUT A ANA IN Gain Accuracy ANA IN (GA) A ANA IN Gain Tracking ANA IN (GT) R ANA IN Input ANA IN Resistance (14) ...
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Symbol Characteristic F Frequency Response R (300–3400 Hz) P Power Output (Low OUTLG Gain Setting) SINAD SINAD ANA IN to SP+/– (14) ANA OUT SINAD SINAD MIC IN to ANA OUT +/- SINAD SINAD AUX IN to ANA OUT (0 ...
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ISD5008 Product Symbol Characteristic V AUX OUT BIAS SINAD SINAD—ANA IN to AUX OUT ICN Idle Channel Noise— (AUX OUT) ANA IN to AUX OUT C T AUX OUT to ANA OUT R AUX OUT/ANA cross Talk OUT (14) VOLUME ...
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Symbol Characteristics T SS Setup Time SSS T SS Hold Time SSH T Data in Setup Time DIS T Data in Hold Time DIH T Output Delay PD T Output Delay to hiZ HIGH SSmin T SCLK ...
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ISD5008 Product 6 TIMING DIAGRAMS Figure 18: 8-Bit SPI Command Format 34 Figure 17: SPI Timing Diagram Voice Solutions in Silicon™ ...
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Figure 19: 24-Bit SPI Command Format SS BYTE 1 SCLK MOSI MISO OVF EOM Figure 20: Playback/Record and Stop Cycle ISD BYTE D10 D11 D12 ...
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ISD5008 Product 7 DEVICE PHYSICAL DIMENSIONS Figure 21: 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP) Type I (E) Table 18: Plastic Thin Small Outline Package (TSOP) Type I (E) Dimensions INCHES Min Nom A 0.520 0.528 B 0.461 ...
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Figure 22: 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) (P) Table 19: Plastic Dual Inline Package (PDIP) (P) Dimensions INCHES Min Nom A 1.445 1.450 B1 0.150 B2 0.065 0.070 C1 0.600 C2 0.530 0.540 D D1 0.015 E 0.125 ...
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ISD5008 Product Figure 23: 28-Lead 0.300-Inch Plastic Small Outline Integrated Circuit (SOIC) (S) Table 20: Plastic Small Outline Integrated Circuit (SOIC) (S) Dimensions INCHES Min Nom A 0.701 0.706 B 0.097 0.101 C 0.292 0.296 D 0.005 0.009 E 0.014 ...
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Figure 24: ISD5008 Series Bonding Physical Layout ISD5008 Series I. Die Dimensions X: 166.5 ±1 mils Y: 302.4 ±1 mils (3) II. Die Thickness 11.5 ±1.0 mils III. Pad Opening (min microns 3.5 x 3.5 mils V ...
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ISD5008 Product Table 21: ISD5008 Series Device Pin/Pad Designations, Pin V V Digital Power Supply SSD Digital Power Supply SSD SS MISO Master In Slave Out MOSI Master Out Slave In SS Slave Select SCLK Slave Clock ...
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Figure 25: SD5008 Chip Scale Package (CSP) ( TOP VIEW SIDE VIEW Table 22: CSP Dimensions (mm) Symbol Min. Nom. A — 0. — 0.55 b 0.30 0.35 C ...
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... Plastic Thin Small Outline Package (TSOP) Type 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP 28-Lead 0.300-Inch Plastic Small Outline Package (SOIC Die Z = Chip Scale Package (CSP) Part Number ISD5008E ISD5008ED ISD5008EI ISD5008P ISD5008S ISD5008SD ISD5008SI ISD5008X ISD5008Z ISD5008ZD ISD5008ZI ™ Voice Solutions in Silicon ...
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VERSION HISTORY VERSION DATE 0 Before 2005 0.1 May 2005 DESCRIPTION Initial issue Add revision history Update the disclaim section. Publication Release Date: May, 2005 Revision 0.1 ...
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Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other ...