CY8C5366LTI-053 Cypress Semiconductor Corp, CY8C5366LTI-053 Datasheet - Page 22
CY8C5366LTI-053
Manufacturer Part Number
CY8C5366LTI-053
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY8C5366LTI-053.pdf
(106 pages)
Specifications of CY8C5366LTI-053
Lead Free Status / Rohs Status
Compliant
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6.2 Power System
The power system consists of separate analog, digital, and I/O supply pins, labeled V
includes two internal 1.8 V regulators that provide the digital (V
pins of the regulators (V
pins must be shorted together, with as short a trace as possible, and connected to a 1 µF ±10% X5R capacitor. The power system
also contains a sleep regulator and a hibernate regulator.
Note The two V
shown in
Document Number: 001-66237 Rev. *A
Figure
CCD
2-4.
pins must be connected together with as short a trace as possible. A trace under the device is recommended, as
CCD
and V
Vddio1
Vddio2
Vssb
CCA
0.1 µF
0.1 µF
) and the V
I/O Supply
I/O Supply
Domain
Digital
PRELIMINARY
Figure 6-4. PSoC Power System
DDIO
1 µF
pins must have capacitors connected as shown in
Regulators
Digital
CCD
0.1µF
) and analog (V
Vddd
Vddd
PSoC
0.1 µF
Regulator
I/O Supply
Regulator
Hibernate
Regulator
Sleep
Analog
Domain
Analog
I/O Supply
®
CCA
5: CY8C53 Family Datasheet
) supplies for the internal core logic. The output
DDA
0.1 µF
Vddio0
Vdda
Vcca
, V
Vssa
Vddio3
DDD
, and Vddiox, respectively. It also
Vddio0
1 µF
0.1 µF
Vdda
Figure
0.1 µF
.
6-4. The two V
Page 22 of 106
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