552BF000270DG Silicon Laboratories Inc, 552BF000270DG Datasheet - Page 3
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552BF000270DG
Manufacturer Part Number
552BF000270DG
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.552BF000270DG.pdf
(14 pages)
Specifications of 552BF000270DG
Lead Free Status / Rohs Status
Compliant
Table 3. CLK± Output Frequency Characteristics
Table 4. CLK± Output Levels and Symmetry
Nominal Frequency
Temperature Stability
Absolute Pull Range
Aging
Power up Time
Settling Time After FS Change
Notes:
LVPECL Output Option
LVDS Output Option
CML Output Option
CMOS Output Option
Rise/Fall time (20/80%)
Symmetry (duty cycle)
Notes:
1. See Section 3. "Ordering Information" on page 8 for further details.
2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.
3. Nominal output frequency set by V
4. Selectable parameter specified by part number.
5. Time from power up or tristate mode to f
1. 50 Ω to V
2. R
3. C
Parameter
term
L
= 15 pF
Parameter
= 100 Ω (differential).
DD
5
– 2.0 V.
2
1,2,3
1,4
2
1,4
3
1
Symbol
SYM
t
V
V
V
V
V
V
R,
V
V
V
OD
OD
OD
OH
SE
OL
O
O
O
Symbol
t
F
APR
t
t
OSC
FRQ
f
O
CNOM
LVPECL:
LVDS:
CMOS:
CMOS with C
O
= V
Frequency drift over 15 year life.
swing (single-ended)
LVPECL/LVDS/CML
(to within ±1 ppm of f
Frequency drift over first year.
Test Condition
DD
I
I
OH
swing (diff)
OL
swing (diff)
swing (diff)
/2.
mid-level
mid-level
mid-level
LVDS/CML/LVPECL
T
V
1.25 V (diff)
V
= 32 mA
A
= 32 mA
Test Condition
DD
DD
Rev. 0.6
= –40 to +85 °C
/2
– 1.3 V (diff)
L
CMOS
= 15 pF
O
).
V
0.8 x V
DD
1.125
0.55
0.70
Min
1.1
0.5
45
—
—
—
—
– 1.42
DD
–100
Min
–20
–50
±25
10
10
—
—
—
—
V
DD
0.95
1.20
Typ
0.7
—
—
—
—
—
—
—
– 0.75
1
Typ
—
—
—
—
—
—
—
—
—
—
V
DD
1.275
Max
0.95
1.20
V
350
1.9
0.9
0.4
+100
±375
55
Max
—
—
+20
+50
– 1.25
945
160
±10
DD
±3
10
10
Si552
Units
Units
MHz
ppm
ppm
ppm
V
V
V
V
ms
ms
ps
ns
%
V
V
V
V
PP
PP
PP
PP
3