550CG107M964DG Silicon Laboratories Inc, 550CG107M964DG Datasheet - Page 4
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550CG107M964DG
Manufacturer Part Number
550CG107M964DG
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.550CG107M964DG.pdf
(14 pages)
Specifications of 550CG107M964DG
Lead Free Status / Rohs Status
Compliant
Si 550
Table 5. CLK± Output Phase Jitter
4
Phase Jitter (RMS)
for F
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
OUT
requirements. See “AN266: VCXO Tuning Slope (K
rejection (PSR) advantage of Si55x versus SAW-based solutions.
> 500 MHz
Parameter
1,2,3
Symbol
φ
J
Kv = 33 ppm/V
Kv = 45 ppm/V
Kv = 90 ppm/V
Kv = 135 ppm/V
Kv = 180 ppm/V
Kv = 356 ppm/V
50 kHz to 80 MHz (OC-192)
50 kHz to 80 MHz (OC-192)
50 kHz to 80 MHz (OC-192)
50 kHz to 80 MHz (OC-192)
50 kHz to 80 MHz (OC-192)
50 kHz to 80 MHz (OC-192)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
12 kHz to 20 MHz (OC-48)
Test Condition
V
Rev. 0.6
), Stability, and Absolute Pull Range (APR)” for more information.
V
that meets the application’s minimum APR
Min
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0.26
0.26
0.27
0.26
0.32
0.26
0.40
0.27
0.49
0.28
0.87
0.33
Typ
Max
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Units
ps