571BFB000112DG Silicon Laboratories Inc, 571BFB000112DG Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
571BFB000112DG
Manufacturer Part Number
571BFB000112DG
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.571BFB000112DG.pdf
(30 pages)
Specifications of 571BFB000112DG
Lead Free Status / Rohs Status
Compliant
Table 6. CLK± Output Phase Jitter (Si571) (Continued)
Phase Jitter (RMS)
for F
CMOS Output Only
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
4. Single ended mode: CMOS. Refer to the following application notes for further information:
OUT
requirements. See “AN266: VCXO Tuning Slope (K
rejection (PSR) advantage of Si55x versus SAW-based solutions.
“AN255: Replacing 622 MHz VCSO Device with the Si55x VCXO”
“AN256: Integrated Phase Noise”
“AN266: VCXO Tuning Slope (Kv), Stability, and Absolute Pull Range (APR)”
Parameter
10 to 160 MHz
2,4
Symbol
J
Kv = 33 ppm/V
Kv = 45 ppm/V
Kv = 90 ppm/V
Kv = 135 ppm/V
Kv = 180 ppm/V
Kv = 356 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
Test Condition
V
Rev. 1.2
), Stability, and Absolute Pull Range (APR)” for more information.
V
Min
that meets the application’s minimum APR
—
—
—
—
—
—
—
—
—
—
—
—
0.63
0.62
0.63
0.62
0.67
0.66
0.74
0.72
0.83
1.26
Typ
0.8
1.2
Si570/Si571
Max
—
—
—
—
—
—
—
—
—
—
—
—
Units
ps
9