DS21Q50L-W+ Maxim Integrated Products, DS21Q50L-W+ Datasheet - Page 7
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DS21Q50L-W+
Manufacturer Part Number
DS21Q50L-W+
Description
TXRX E1 QUAD CLK/DATA 100LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21Q50L.pdf
(87 pages)
Specifications of DS21Q50L-W+
Function
Transceiver
Interface
E1
Number Of Circuits
4
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
230mA
Mounting Type
Surface Mount
Package / Case
100-LFQFP
Includes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Operating Temperature
-
Other names
90-21Q50+LW0
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Note: This data sheet assumes a particular nomenclature of the E1 operating environment. In each 125µs
frame, there are 32 8-bit time slots numbered 0 to 31. Time slot 0 is transmitted first and received first.
These 32 time slots are also referred to as channels with a numbering scheme of 1 to 32. Time slot 0 is
identical to channel 1; time slot 1 is identical to channel 2; and so on. Each time slot (or channel) is made
up of eight bits that are numbered 1 to 8. Bit number 1, MSB, is transmitted first. Bit number 8, the LSB,
is transmitted last. The term “locked” is used to refer to two clock signals that are phase-locked or
frequency-locked or derived from a common clock (i.e., a 8.192MHz clock can be locked to a 2.048MHz
clock if they share the same 8kHz component). Throughout this data sheet, the following abbreviations
are used:
NAME
TCLK
RCLK
CRC4
E-Bit
LOC
CAS
CCS
FAS
MF
Sa
Si
Frame Alignment Signal
Channel Associated Signaling
Multiframe
International bits
Cyclical Redundancy Check
Common Channel Signaling
Additional bits
CRC4 Error Bits
Loss of Clock
This generally refers to the transmit rate clock and can reference an actual input
signal to the device (TCLK) or an internally derived signal used for transmission.
This generally refers to the recovered network clock and can be a reference to an
actual output signal from the device or an internal signal.
7 of 87
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