DS2155G Maxim Integrated Products, DS2155G Datasheet - Page 9

IC TXRX T1/E1/J1 1-CHIP 100CSBGA

DS2155G

Manufacturer Part Number
DS2155G
Description
IC TXRX T1/E1/J1 1-CHIP 100CSBGA
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of DS2155G

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LFBGA
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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DS2155
REVISION
DESCRIPTION
The definition of the EGL bit in the LIC1 register has been corrected for both T1 and E1
mode.
T1 Mode: EGL = 1 was changed from 15dB to –15dB
E1 Mode: EGL = 0 was changed from –10dB to –12dB
THE FOLLOWING ARE FORMAT CHANGES AND ADDED OR REMOVED
TEXT, TABLES OR DIAGRAMS:
Replace X* format for showing active low signals with X
Remove redundant statements about “multiport configurations” in Interrupt Handling
section
Remove BASIC NETWORK CONNECTIONS figure in LINE INTERFACE UNIT
section
Add “Simplified Diagram of BERT in Network Direction” figure to BERT section
Add “Simplified Diagram of BERT in Backplane Direction” figure to BERT section
Add Receive Signaling Registers (E1 Mode, CCS Format) table to Receive Signaling
section
Add GRIC and GTIC function table to IAAR register
Changed Table of contents to include table of figures and table of tables.
Add note for FASRC bit.
Add T1 and E1 Transmit Flow Chart.
Added RCLK to BPCLK timing diagram.
THE FOLLOWING ARE NEW FEATURES AVAILABLE ON THE DS2155 REV
B1 AND ARE EXPLAINED IN THE BODY OF THE DATA SHEET
Add FRAS0, TCCS, RCCS and GRSRE bits to Signaling Control Register (SIGCR)
Add section on AIS-CI and RAI-CI Generation and Detection
Add RAIS-CI status bit to Status Register 4 (SR4) and Interrupt Mask Register 4 (IMR4)
Add RAIS-CI status bit to Status Register 4 (SR4)
Add TRAI-CI control bit to T1 Common Control Register 1 (TCCR1)
Add TAIS-CI control bit to T1 Common Control Register 1 (TCCR1)
Add Pseudorandom 2E9-1 pattern to PS0, PS1 and PS2 bit description in Bert Control
Register 1 (BCR1)
Add BD bit to Information Register 2 (INFO2)
Add ILUT status bit to Status Register 1 (SR1) and Interrupt Mask Register 1 (IMR1)
Add INTDIS and TMSS bits to Common Control Register 3 (CCR3)
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