SI4313-B1-FMR Silicon Laboratories Inc, SI4313-B1-FMR Datasheet - Page 34

• Manufacturer Part Number: SI4313-B1-FMR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4313-B1-FMR

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Si4313-B1
Another available feature for the microcontroller clock is the clock tail, clkt[1:0] in Register 0Ah. Microcontroller
Output Clock. If the low frequency clock feature is not enabled (enlfc = 0), the system clock to the microcontroller is
disabled in SLEEP mode. However, it may be useful to provide a few extra cycles for the microcontroller to
complete its operation prior to the shutdown of the system clock signal. Setting the clkt[1:0] field will provide
additional cycles of the system clock before it shuts off.
If an interrupt is triggered, the microcontroller clock will remain enabled regardless of the selected mode. As soon
as the interrupt is read, the state machine will move to the selected mode. For instance, if the chip is commanded
to SLEEP mode but an interrupt has occurred, the 30 MHz crystal will be disabled until the interrupt has been
cleared.
8.3. Low Battery Detector
A low battery detector (LBD) with digital readout is integrated into the chip. A digital threshold may be programmed
into the lbdt[4:0] field in "Register 1Ah. Low Battery Detector Threshold". When the digitized battery voltage
reaches this threshold, an interrupt will be generated on the nIRQ pin to the microcontroller. The microcontroller will
then confirm the interrupt source by reading "Register 03h. Interrupt/Status 1" and "Register 04h. Interrupt/Status
2."
If the LBD is enabled while the chip is in SLEEP mode, it will automatically enable the RC oscillator, which
periodically turns on the LBD circuit to measure the battery voltage. The battery voltage may also be read out
through "Register 1Bh. Battery Voltage Level" at any time when the LBD is enabled. The low battery detect function
is enabled by setting enlbd = 1 in "Register 07h. Operating Mode and Function Control 1".
The LBD output is digitized by a 5-bit ADC. When the LBD function is enabled (enlbd = 1 in "Register 07h.
Operating Mode and Function Control 1"), the battery voltage may be read at any time by reading "Register 1Bh.
Battery Voltage Level". A battery voltage threshold may be programmed in “Register 1Ah. Low Battery Detector
Threshold". When the battery voltage level drops below the battery voltage threshold, an interrupt is generated on
the nIRQ pin to the microcontroller if the LBD interrupt is enabled in "Register 06h. Interrupt Enable 2". The
microcontroller will then need to verify the interrupt by reading the interrupt status register, addresses 03 and 04h.
The LSB step size for the LBD ADC is 50 mV, with the ADC range demonstrated in Table 15. If the LBD is enabled,
the LBD and ADC will automatically be enabled every 1 s for approximately 250 µs to measure the voltage which
minimizes the current consumption in Sensor mode. Before an interrupt is activated, four consecutive readings are
required.
34
1A
1B
Add
R/W
R/W
R
Battery Voltage Level
Low Battery Detector
Description
Threshold
Func/
Battery Voltage
clkt[1:0]
00
01
10
11
D7
0
D6
=
0
Rev. 1.0
1.7
+
D5
0
50 mV
Clock Frequency
vbat[4] vbat[3] vbat[2] vbat[1] vbat[0]
lbdt[4] lbdt[3] lbdt[2] lbdt[1] lbdt[0]
D4

128 cycles
256 cycles
512 cycles
0 cycles
ADC
VALUE
D3
D2
D1
D0
POR Def
14h
—