SI3216-C-FM Silicon Laboratories Inc, SI3216-C-FM Datasheet - Page 72

IC SLIC/CODEC 1CH 38QFN

SI3216-C-FM

Manufacturer Part Number
SI3216-C-FM
Description
IC SLIC/CODEC 1CH 38QFN
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheet

Specifications of SI3216-C-FM

Package / Case
*
Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
PCM, SPI
Number Of Circuits
1
Voltage - Supply
3.13 V ~ 5.25 V
Current - Supply
88mA
Power (watts)
700mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Includes
Audio Tone Generation, BORSCHT Functions, FSK Generation, Ringing and Battery Voltage Generation
Product
SLIC
Supply Voltage (min)
3.13 V
Supply Current
88 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Number Of Channels
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3216-C-FM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
SI3216-C-FMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
SI3216-C-FMR
Quantity:
2 554
Si3216
Register 28. Indirect Data Access—Low Byte
Reset settings = 0000_0000
Register 29. Indirect Data Access—High Byte
Reset settings = 0000_0000
72
Name
Name
Type
Type
Bit
7:0
Bit
7:0
Bit
Bit
IDA[15:8]
IDA[7:0]
Name
Name
D7
D7
D6
D6
Indirect Data Access—Low Byte.
A write to IDA followed by a write to IAA will place the contents of IDA into an indirect
register at the location referenced by IAA at the next indirect register update (16 kHz
update rate—a write operation). Writing IAA only will load IDA with the value stored at
IAA at the next indirect memory update (a read operation).
Indirect Data Access—High Byte.
A write to IDA followed by a write to IAA will place the contents of IDA into an indirect
register at the location referenced by IAA at the next indirect register update (16 kHz
update rate—a write operation). Writing IAA only will load IDA with the value stored at
IAA at the next indirect memory update (a read operation).
D5
D5
D4
D4
IDA[15:8]
IDA[7:0]
R/W
R/W
Rev. 1.0
D3
D3
Function
Function
D2
D2
D1
D1
D0
D0

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