DS21352L+ Maxim Integrated Products, DS21352L+ Datasheet - Page 107
DS21352L+
Manufacturer Part Number
DS21352L+
Description
IC TXRX T1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21352L.pdf
(137 pages)
Specifications of DS21352L+
Function
Single-Chip Transceiver
Interface
HDLC, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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20. INTERLEAVED PCM BUS OPERATION
In many architectures, the outputs of individual framers are combined into higher speed serial buses to
simplify transport across the system. The DS21352/552 can be configured to allow data and signaling
buses to be multiplexed into higher speed data and signaling buses eliminating external hardware saving
board space and cost.
The interleaved PCM bus option (IBO) supports two bus speeds. The 4.096 MHz bus speed allows two
SCTs to share a common bus. The 8.192 MHz bus speed allows four SCTs to share a common bus. See
Figure 20-1 for an example of 4 devices sharing a common 8.192MHz PCM bus. Each SCT that shares a
common bus must be configured through software and requires the use of one or two device pins. The
elastic stores of each SCT must be enabled and configured for 2.048 MHz operation. See Figure 21-6
and Figure 21-7.
For all bus configurations, one SCT will be configured as the master device and the remaining SCTs will
be configured as slave devices. In the 4.096 MHz bus configuration there is one master and one slave. In
the 8.192 MHz bus configuration there is one master and three slaves. Refer to the IBO register
description for more detail.
IBO: INTERLEAVE BUS OPERATION REGISTER (Address = 94 Hex)
(MSB)
INTSEL
SYMBOL
MSEL0
MSEL1
IBOEN
-
-
-
-
-
-
IBO.7
IBO.6
IBO.5
IBO.4
IBO.3
IBO.2
IBO.1
IBO.0
POSITION
Not Assigned. Should be set to 0.
Not Assigned. Should be set to 0.
Not Assigned. Should be set to 0.
Not Assigned. Should be set to 0.
Interleave Bus Operation Enable
0 = Interleave Bus Operation disabled.
1 = Interleave Bus Operation enabled.
Interleave Type Select
0 = Byte interleave.
1 = Frame interleave.
Master Device Bus Select Bit 0. See Table 20-1.
Master Device Bus Select Bit 1. See Table 20-1.
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NAME AND DESCRIPTION
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107 of 137
IBOEN
INTSEL
MSEL0
MSEL1
(LSB)
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