C8051T605-GSR Silicon Laboratories Inc, C8051T605-GSR Datasheet - Page 115

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C8051T605-GSR

Manufacturer Part Number
C8051T605-GSR
Description
MCU 8-Bit C8051T60x 8051 CISC 2KB EPROM 1.8V/3V 14-Pin SOIC T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051T605-GSR

Package
14SOIC
Device Core
8051
Family Name
C8051T60x
Maximum Speed
25 MHz
Ram Size
256 Byte
Program Memory Size
2 KB
Operating Supply Voltage
1.8|3 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
8
Interface Type
I2C/SMBus/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
3
SFR Definition 22.1. XBR0: Port I/O Crossbar Register 0
SFR Address = 0xE1
Name
Reset
Bit
6:0 XSKP[6:0] Crossbar Skip Enable Bits.
Type
7
Bit
Unused
Name
R
7
0
Unused. Read = 0; Write = Don’t Care.
These bits select port pins to be skipped by the crossbar decoder. Port pins used for
analog, special functions or GPIO should be skipped by the crossbar.
0: Corresponding P0.n pin is not skipped by the crossbar.
1: Corresponding P0.n pin is skipped by the crossbar.
Note: Bits 6 and 0 on the C8051T606 are read-only with a reset value of ‘1’.
0*
6
5
0
Rev. 1.2
4
0
Function
XSKP[6:0]
C8051T600/1/2/3/4/5/6
R/W
3
0
2
0
1
0
0*
0
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