AM186CC-50KD\W C AMD (ADVANCED MICRO DEVICES), AM186CC-50KD\W C Datasheet - Page 29

• Manufacturer Part Number: AM186CC-50KD\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-50KD\W C

• Lead Free Status / Rohs Status: Compliant

n Four independent Time Slot Assigners (TSAs)
n 12 Direct Memory Access (DMA) channels
n High-speed asynchronous serial interface
n Asynchronous serial interface (UART)
Am186 Embedded CPU
All members of the Am186 family, including the
Am186CC microcontroller, are compatible with the
original industry-standard 186 parts, and build on the
same core set of 186 registers, I/O space, address
generation, instruction set, segments, data types, and
addressing modes.
Memory Organization
Memory is organized in sets of segments. Each
segment is a linear contiguous sequence of 64K (2
8-bit bytes. Memor y is addressed using a two-
component address consisting of a 16-bit segment
value and a 16-bit offset. The 16-bit segment values
are contained in one of four internal segment registers
(CS, DS, SS, or ES). The physical address is
calculated by shifting the segment value left by 4 bits
provide flexible time slot allocation
– Allows isolation of Time Division Multiplexed (TDM)
– Up to 4096 sequential bits isolated
– TDM bus can have up to 512 8-bit time slots
– Start bit and stop bit times identify isolated
– 12-bit counters define the start/stop bit times as
– Entire frame down to 1 bit per frame can be isolated
– Eight buffer descriptor ring SmartDMA channels
– Four general-purpose DMAs support the two
provides enhanced UART functions
– Capable of sustained operation at 460 Kbaud
– 7-, 8-, or 9-bit data transfers
– FIFOs to support high-speed operation
– DMA support available
– Automatic baud rate detection that allows
– Independent baud generator with clock input
– 7-, 8-, or 9-bit data transfers
– DMA support available
time slot of choice from a variety of TDM carriers
portion of TDM frame
the number of bits after frame synchronization
for the four HDLC channels and, optionally, USB
bulk and isochronous endpoints
integrated asynchronous serial ports and/or USB
endpoints. Two DMA channels have external
DMA request inputs
emulation of a Hayes AT-compatible modem
source programmable to use CPU or external
clock input pin
Am186™CC Communications Controller Data Sheet
16
)
n General Circuit Interface (GCI) provides IOM-2
n Synchronous Serial Interface (SSI) provides
n Clocking options offer high flexibility
and adding the 16-bit offset value to yield a 20-bit
physical address (see Figure 2 on page 30). This
allows for a 1-Mbyte physical address size.
All instructions that address operands in memory must
specify the segment value and the 16-bit offset value.
For speed and compact instruction encoding, the
segment register used for physical address generation
is implied by the addressing mode used (see Table 5
on page 30).
I/O Space
The I/O space consists of 64K 8-bit or 32K 16-bit ports.
Separate instructions (IN, INS and OUT, OUTS)
address the I/O space with either an 8-bit port address
specified in the instruction, or a 16-bit port address in
the DX register. Eight-bit port addresses are zero-
extended such that A15–A8 are Low.
– Independent baud generator with clock input
Terminal Mode connection
– Glueless connection between the Am186CC
– Four-pin GCI connection
– Terminal mode operation
– Slave mode with pin reversal
– Telecom IC (TIC) bus support for D channel
– Support for one Monitor and two Command/
– Clock and Frame Sync conversion for PCM
half-duplex, bidirectional interface to high-
speed peripherals
– Useful with many telecommunication interface
– Selectable device-select polarity
– Selectable bit shift order on transmit and receive
– Glueless connection to AMD Subscriber Line
– Separate crystal oscillator inputs for system and
– CPU can run in 1x, 2x, or 4x mode
– USB can run in 2x or 4x mode
– USB can run from system clock if running at
source programmable to use CPU or external
clock input pin
microcontroller and GCI-based ISDN transceiver
devices, such as the Am79C30/Am79C32
arbitration and collision detection
Indicate channels
Highway coder-decoders (codecs)
peripherals such as codecs, line interface units,
and tranceivers
Audio Processing Circuit (SLAC™) devices
USB clock sources
48 MHz, allowing entire system to run from one
12-MHz or 24-MHz crystal
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