SY58040UMG Micrel Inc, SY58040UMG Datasheet - Page 6

• Manufacturer Part Number: SY58040UMG
• Description: IC CROSSPOINT SWITCH 4X4 44MLF
• Manufacturer: Micrel Inc
• Series: SY58r

Specifications of SY58040UMG

• Function: Crosspoint Switch
• Circuit: 1 x 4:4
• Current - Supply: 225mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-MLF®, QFN
• Number Of Arrays: 1
• Differential Data Transmission: Yes
• Power Supply Requirement: Single
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Cascading Capability: No
• Line Code: NRZ
• On-chip Buffers: No
• On-chip Decoder: No
• On-chip Latch Circuit: No
• On-chip Mux/demux: No
• Programmable: No
• Operating Supply Voltage (max): 3.6V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Input Level: CML/LVDS/LVPECL
• Output Level: CML
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-1397

Micrel, Inc.
M9999-103009
[e-mail] or [phone]
V
Symbol
f
t
t
∆t
t
t
t
t
t
Notes:
8. High-frequency AC-parameters are guaranteed by design and characterization.
9. Output-to-output skew is measured between two different outputs under identical input transitions.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the
11. Random jitter is measured with a K28.7 character pattern, measured at <f
12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 2
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, T
14. Total jitter definition: with an ideal clock input of frequency <f
15. Crosstalk induced jitter is defined as the added jitter that results from signals applied to two adjacent channels. It is measured at the output while
MAX
pd
pw
S
H
SKEW
JITTER
r
, t
CC
pd
AC ELECTRICAL CHARACTERISTICS
f
respective inputs
signal.
specified peak-to-peak jitter value.
applying two similar differential clock frequencies that are asynchronous with respect to each other at the inputs.
Tempco Differential Propagation Delay
= 2.5V ±5% or 3.3V ±10%; T
Output-to-Output Skew
Pulse Width of LOAD/CONFIG signal
Output Rise/Fall Time
Temperature Coefficient
Set-Up Time
Data
Parameter
Differential Propagation Delay
Hold Time
Part-to-Part Skew
Clock
Maximum Operating Frequency
LOAD-to-SIN, LOAD-to-SOUT
Crosstalk-induced Jitter
Deterministic Jitter (DJ)
Cycle-to-Cycle Jitter
Random Jitter (RJ)
LOAD-to-CONFIG
CONFIG-to-LOAD
A
= –40°C to +85°C, R
SOUT-to-LOAD
Total Jitter (TJ)
SIN-to-LOAD
Condition
V
IN-to-Q
CONFIG-to-Q
Note 9
Note 10
Note 11
Note 12
Note 13
Note 14
Note 15
At full output swing, 20% to 80%.
L
OUT
(8)
= 100Ω across each output pair, unless otherwise stated.
MAX
≥ 200mV
, no more than one output edge in 10
6
MAX
23
–1 PRBS pattern.
.
n
– T
n-1
where T is the time between rising edges of the output
NRZ data
12
Clock
output edges will deviate by more than the
1500
Min
150
800
800
800
950
800
20
5
Typ
225
225
40
3
Max
350
500
150
0.7
25
10
10
60
1
1
SY58040U
ps
ps
ps
Units
Gbps
fs/°C
ps
ps
GHz
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
RMS
RMS
RMS
PP
PP