MT36HTS1G72FY-667A1D4 Micron Technology Inc, MT36HTS1G72FY-667A1D4 Datasheet
MT36HTS1G72FY-667A1D4
Specifications of MT36HTS1G72FY-667A1D4
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MT36HTS1G72FY-667A1D4 Summary of contents
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... PDF: 09005aef82ba0f01 hts36c1gx72fy.pdf - Rev. B 12/09 EN Products and specifications discussed herein are subject to change by Micron without notice. 8GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Figure 1: 240-Pin FBDIMM (MO-256 R/C J) Module height: 30.35mm (1.19in) Options • Package – 240-pin DIMM (Pb-free) • Frequency/CAS latency – ...
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... The data sheet for the base device can be found on Micron’s Web site. Notes: 2. All part numbers end with a four-place code (not shown) that designates component, PCB, and AMB revi- sions. Consult factory for current revision codes. Example: MT36HTS1G72FY- 667A1D4. PDF: 09005aef82ba0f01 hts36c1gx72fy.pdf - Rev. B 12/09 EN ...
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Pin Assignments and Descriptions Table 4: Pin Assignments 240-Pin FBDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol PN3 PN3 ...
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... M_TEST The M_TEST pin provides an external connection for testing the margin of V duced by a voltage divider on the module not intended to be used in normal system operation and must not be connected (DNU system. This test pin may have other fea- tures on future card designs and will be included in this specification at that time. ...
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... System Block Diagram Commodity DDR2 DDR2 SDRAM component devices DDR2 component DDR2 component DDR2 component modules AMB • • • DDR2 component DDR2 component DDR2 component DDR2 component SMBus access to buffer registers Micron Technology, Inc. reserves the right to change products or specifications without notice. ...
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Functional Block Diagram Figure 3: Functional Block Diagram V SS RS0# RS1# DQS0 DQS0# DQ0 DQ1 DQ2 DQ3 DQS1 DQS1# DQ8 DQ9 DQ10 DQ11 DQS2 DQS2# DQ16 DQ17 DQ18 DQ19 DQS3 DQS3# DQ24 DQ25 DQ26 DQ27 DQS4 DQS4# DQ32 DQ33 ...
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... Serial Presence-Detect (SPD) for Fully Buffered DIMM – JEDEC Standard No. 21-C, page 4.1.2.7-1 This DDR2 SDRAM module is a high-bandwidth, large-capacity channel solution that has a narrow host interface. FBDIMM devices use DDR2 SDRAM devices isolated from the channel behind an AMB buffer on the FBDIMM. Memory device capacity remains high, and total memory capacity scales with DDR2 SDRAM bit density ...
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Table 6: I Conditions (Continued) DD Symbol Condition I Training: Primary and secondary channels enabled; 100% toggle on all channel lanes; DD_TRAINING DRAMs idle; 0% bandwidth; CKE HIGH; Command and address lines stable; DDR2 SDRAM clock active I IBIST over ...
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Table 10: Serial Presence-Detect EEPROM AC Operating Conditions Parameter/Condition SCL LOW to SDA data-out valid Time the bus must be free before a new transition can start Data-out hold time SDA and SCL fall time Data-in hold time Start condition ...
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... Back view with heat spreader U14 U15 U12 U13 U16 U17 U20 additional design dimensions. times occur. 10 Module Dimensions 0.75 (0.03 2.0 (0.079) TYP 30.5 (1.201 30.2 (1.189) 17.3 (0.681) TYP 9.5 (0.374) TYP 3.9 (0.153) TYP (2X) Pin 120 45° x 0.18 (0.0071) 1 ...