ISL88012EVAL1Z Intersil, ISL88012EVAL1Z Datasheet - Page 7

• Manufacturer Part Number: ISL88012EVAL1Z
• Description: EVALUATION BOARD FOR ISL88012
• Manufacturer: Intersil
• Series: -r

Specifications of ISL88012EVAL1Z

• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: No
• Utilized Ic / Part: ISL88012
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Specifications
NOTES:
Pin Description
RST
The push-pull RST output is set to V
the device is first powered up, 2) either V
VMON falls below their respective minimum voltage sense
levels, 3) MR is asserted or 4) the watchdog timeout expires.
RST/MR
This pin functions as both a reset output and a manual reset
input. The RST output functions identically to the
complementary RST output but is an open drain output that
is pulled to GND (LOW) when reset is asserted. The MR
input is an active-low debounced input to which a user can
connect a push-button to add manual reset capability or
drive with active low signal from a controller.
V
The V
the ISL88011, ISL88012 and ISL88013. For these devices,
the voltage at this pin is compared against an internal
factory-programmed voltage trip point, V
first asserted when the device is initially powered up to
ensure that the power supply has stabilized. Thereafter,
reset is again asserted whenever V
The device is designed with hysteresis to help prevent
chattering due to noise.
RESET
V
V
t
t
C
MANUAL RESET
V
t
WATCHDOG TIMER (Note 8)
Start t
t
t
V
V
I
SYMBOL
RPD
POR
MR
WDT
WDPS
WDT
6. Applies to ISL88012
7. Applies to ISL88014 and ISL88015.
8. Applies to ISL88013 and ISL88015.
OL
OH
MR
IL
IH
DD
LOAD
WDT
DD
pin is the power supply terminal. It is monitored by
Reset Output Voltage Low
Reset Output Voltage High
V
POR Timeout Delay
Load Capacitance on Reset Pins
MR Input Voltage
MR Minimum Pulse Width
Start-up Watchdog Timeout Period
Normal Watchdog Timeout Period
WDI Minimum Pulse Width
Watchdog Input Voltage Low
Watchdog Input Voltage High
Watchdog Input Current
TH
to Reset Asserted Delay
PARAMETER
ISL88011, ISL88012, ISL88013, ISL88014, ISL88015
7
Over the recommended operating conditions unless otherwise specified, R
DD
DD
falls below V
(HIGH) whenever 1)
DD
THVDD
or the voltage on
V
V
V
V
ISL88012, ISL88013, ISL88015
ISL88011, ISL88014 with C
DD
DD
DD
DD
. A reset is
≥ 3.3V, Sinking 0.5mA
< 3.3V, Sinking 0.5mA
≥ 3.3V, Sourcing 0.4mA
< 3.3V, Sourcing 0.4mA
THVDD
TEST CONDITIONS
.
VMON
The VMON pin on the ISL88012, ISL88014 and ISL88015 is
a monitored input voltage that is user-adjustable. The
voltage at this pin is compared against an internal 600mV
reference voltage (V
whenever the monitored voltage falls below this trip point.
WDI
The Watchdog Input takes an input from a microprocessor
and ensures that it periodically toggles the WDI pin,
otherwise the internal watchdog timer runs out and reset is
asserted. The internal Watchdog Timer is cleared whenever
the WDI input pin sees a rising or falling edge or the device
is manually reset.
C
The C
timeout delay (t
C
POR
POR
POR
= OPEN
POR
and ground. (See Figure 3)
input pin lets users increase the Power-On Reset
0.85 x V
V
V
POR
DD
DD
MIN
140
200
100
1.0
32
0
1
-0.6
-0.6
) by connecting a capacitor between
THVMON
DD
V
V
DD
DD
TYP
0.05
0.05
200
250
1.6
60
51
PU
5
) and a reset is asserted
-0.4
-0.4
= 10k
Ω
0.3 x V
. (Continued)
MAX
0.40
0.40
260
100
100
2.0
64
DD
UNITS
April 8, 2011
mV
sec
sec
ms
ms
nA
µs
pF
µs
ns
FN8093.2
V
V
V
V
V
V