MAX4802CQI+ Maxim Integrated Products, MAX4802CQI+ Datasheet - Page 11

• Manufacturer Part Number: MAX4802CQI+
• Description: IC SWITCH OCTAL SPST 28PLCC
• Manufacturer: Maxim Integrated Products

Specifications of MAX4802CQI+

• Function: Switch
• Circuit: 8 x SPST - NO
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-LCC (J-Lead)
• Switch Configuration: SPST
• On Resistance (max): 48 Ohms
• On Time (max): 5 us
• Off Time (max): 5 us
• Off Isolation (typ): - 77 dB
• Supply Voltage (max): 13.2 V
• Supply Voltage (min): 2.7 V
• Supply Current: 4 mA
• Maximum Power Dissipation: 842 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Off State Leakage Current (max): 10 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX4800/MAX4801/MAX4802 digital interface
inputs CLK, DIN, LE, and CLR are tolerant of up to
+13.2V, independent of the V
ing compatibility with higher voltage controllers.
Digital output DOUT is provided to allow the connection
of multiple MAX4800/MAX4801/MAX4802 devices by
daisy chaining (Figure 3). Connect each DOUT to the
DIN of the subsequent device in the chain. Connect CLK,
LE, and CLR inputs of all devices, and drive LE logic-low
to update all devices simultaneously. Drive CLR high to
open all the switches simultaneously. Additional shift reg-
isters may be included anywhere in series with the
MAX4800/MAX4801/MAX4802 data chain.
Table 1. Serial Interface Programming
X = Don’t Care
(LSB)
D0
H
X
X
L
D1
H
X
X
L
D2
Daisy Chaining Multiple Devices
H
X
X
L
8-Channel, High-Voltage Analog Switches
Applications Information
______________________________________________________________________________________
DATA BITS
D3
H
L
X
X
D4
H
X
X
L
DD
D5
H
X
X
L
supply voltage, allow-
D6
H
X
X
L
Logic Levels
(MSB)
D7
H
X
X
L
LE
CONTROL BITS
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
CLR
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
The MAX4800/MAX4801/MAX4802 do not require spe-
cial sequencing of the V
ages; however, analog switch inputs must be
unconnected, or satisfy V
during power-up and power-down. Bypass V
and V
close to the device as possible.
PROCESS: BCDMOS
Low-Charge Injection,
SW0
OFF
OFF
ON
PP
to GND with a 0.1µF ceramic capacitor as
SW1
OFF
OFF
ON
Supply Sequencing and Bypassing
SW2
OFF
OFF
ON
HOLD PREVIOUS STATE
SW3
OFF
OFF
ON
DD
FUNCTION
NN
, V
Chip Information
PP
SW4
OFF
OFF
≤ (V
ON
, and V
COM_
SW5
OFF
OFF
ON
NN
, V
supply volt-
NO_
SW6
OFF
OFF
ON
DD
) ≤ V
, V
SW7
OFF
OFF
ON
NN
PP
11
,