AD9634BCPZ-170 Analog Devices Inc, AD9634BCPZ-170 Datasheet - Page 8

58T8924

AD9634BCPZ-170

Manufacturer Part Number
AD9634BCPZ-170
Description
58T8924
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9634BCPZ-170

Resolution (bits)
12bit
Sampling Rate
170MSPS
Input Channel Type
Differential
Data Interface
Serial, SPI
Supply Voltage Range - Analog
1.7V To 1.9V
Rohs Compliant
Yes
AD9634
TIMING SPECIFICATIONS
Table 5.
Parameter
SPI TIMING REQUIREMENTS
t
t
t
t
t
t
t
t
t
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
Test Conditions/Comments
See Figure 58 for the SPI timing diagram
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Time required for the SDIO pin to switch from an input to an output
relative to the SCLK falling edge (not shown in Figure 58)
Time required for the SDIO pin to switch from an output to an input
relative to the SCLK rising edge (not shown in Figure 58)
Rev. 0 | Page 8 of 32
Min
2
2
40
2
2
10
10
10
10
Typ
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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